A Codesign Case Study: Implementing Arithmetic Functions in FPGA's. - Ilya V. Klotchkov; S. Pedersen (ECBS, 1996)

Timing Extensions of STG Model and a Method to Simulate Timed STG Behavior in VHDL Environment. - Michael V. Goncharov; Alexander B. Smirnov; Nikolai Starodoubtsev; Ilya V. Klotchkov (ACSD, 1998)

Towards Synthesis of Monotonic Asynchronous Circuits from Signal Transition Graphs. - Nikolai Starodoubtsev; Sergei Bystrov; Michael V. Goncharov; Ilya V. Klotchkov; Alexander B. Smirnov (ACSD, 2001)