Statistical estimation of leakage-induced power grid voltage drop considering within-die process variations. - Imad A. Ferzli; Farid N. Najm (DAC, 2003)

Statistical Verification of Power Grids Considering Process-Induced Leakage Current Variations. - Imad A. Ferzli; Farid N. Najm (ICCAD, 2003)

Incremental partitioning-based vectorless power grid verification. - Dionysios Kouroussis; Imad A. Ferzli; Farid N. Najm (ICCAD, 2005)

Analysis and verification of power grids considering process-induced leakage-current variations. - Imad A. Ferzli; Farid N. Najm (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

A geometric approach for early power grid verification using current constraints. - Imad A. Ferzli; Farid N. Najm; Lars Kruse (ICCAD, 2007)

Early power grid verification under circuit current uncertainties. - Imad A. Ferzli; Farid N. Najm; Lars Kruse (ISLPED, 2007)

A Yield Model for Integrated Circuits and its Application to Statistical Timing Analysis. - Farid N. Najm; Noel Menezes; Imad A. Ferzli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Verification and Codesign of the Package and Die Power Delivery System Using Wavelets. - Imad A. Ferzli; Eli Chiprout; Farid N. Najm (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)