A novel stereovision algorithm for obstacles detection based on U-V-disparity approach. - Imad Benacer; Aicha Hamissi; Abdelhakim Khouas (ISCAS, 2015)

Hardware design and FPGA implementation for road plane extraction based on V-disparity approach. - Imad Benacer; Aicha Hamissi; Abdelhakim Khouas (ISCAS, 2015)

A fast systolic priority queue architecture for a flow-based Traffic Manager. - Imad Benacer; François-Raymond Boyer; Normand Bélanger; Yvon Savaria (NEWCAS, 2016)

Extracting parameters of OFET before and after threshold voltage using genetic algorithms. - Imad Benacer; Zohir Dibi (Int. J. Autom. Comput., 2016)

A high-speed traffic manager architecture for flow-based networking. - Imad Benacer; François-Raymond Boyer; Yvon Savaria (NEWCAS, 2017)

Design of a Low Latency 40 Gb/s Flow-Based Traffic Manager Using High-Level Synthesis. - Imad Benacer; François-Raymond Boyer; Yvon Savaria (ISCAS, 2018)

HPQ: A High Capacity Hybrid Priority Queue Architecture for High-Speed Network Switches. - Imad Benacer; François-Raymond Boyer; Yvon Savaria (NEWCAS, 2018)

A Fast, Single-Instruction-Multiple-Data, Scalable Priority Queue. - Imad Benacer; François-Raymond Boyer; Yvon Savaria (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A High-Speed, Scalable, and Programmable Traffic Manager Architecture for Flow-Based Networking. - Imad Benacer; François-Raymond Boyer; Yvon Savaria (IEEE Access, 2019)

HPQS: A Fast, High-Capacity, Hybrid Priority Queuing System for High-Speed Networking Devices. - Imad Benacer; François-Raymond Boyer; Yvon Savaria (IEEE Access, 2019)