A digitally controlled phase-locked loop with a digital phase-frequency detector for fast acquisition. - In-Chul Hwang; Sang-Hun Song; Soo-Won Kim (IEEE J. Solid State Circuits, 2001)

A low-power small-area ±7.28-ps-jitter 1-GHz DLL-based clock generator. - Chulwoo Kim; In-Chul Hwang; Sung-Mo Kang (IEEE J. Solid State Circuits, 2002)

A Σ-Δ fractional-N frequency synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications. - Han-Il Lee; Je-Kwang Cho; Kun-Seok Lee; In-Chul Hwang; Tae-Won Ahn; Kyung-Suc Nah; Byeong-Ha Park (ESSCIRC, 2003)

Design and Implementation of the Cooperative Cache for PVFS. - In-Chul Hwang; Hojoong Kim; Hanjo Jung; Dong-Hwan Kim; Hojin Ghim; Seung Ryoul Maeng; Jung Wan Cho (International Conference on Computational Science, 2004)

A CMOS self-regulating VCO with low supply sensitivity. - In-Chul Hwang; Chulwoo Kim; Sung-Mo Kang (IEEE J. Solid State Circuits, 2004)

A Σ-Δ fractional-N frequency synthesizer using a wide-band integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications. - Han-Il Lee; Je-Kwang Cho; Kun-Seok Lee; In-Chul Hwang; Tae-Won Ahn; Kyung-Suc Nah; Byeong-Ha Park (IEEE J. Solid State Circuits, 2004)

Fast AFC technique using a code estimation and binary search algorithm for wideband frequency synthesis. - Kun-Seok Lee; Eun-yung Sung; In-Chul Hwang; Byeong-Ha Park (ESSCIRC, 2005)

Design and Implementation of the Home-Based Cooperative Cache for PVFS. - In-Chul Hwang; Hanjo Jung; Seung Ryoul Maeng; Jung Wan Cho (International Conference on Computational Science (3), 2005)

2-Phase Protocol: Enhancing Write Performance in Cooperative Cache for PVFS. - In-Chul Hwang; Hanjo Jung; Seung Ryoul Maeng; Jung Wan Cho (Parallel and Distributed Computing and Networks, 2005)

Design and Implementation of Cooperative Cluster File System. - In-Chul Hwang; Donghyouk Lim; Seung Ryoul Maeng; Jung Wan Cho (PDPTA, 2005)

Home-based Cooperative Cache for parallel I/O applications. - In-Chul Hwang; Seung Ryoul Maeng; Jung Wan Cho (Future Gener. Comput. Syst., 2006)

Multi-band wide tuning range CMOS VCO with Hybrid Inductor for LTE standard. - Seonghan Ryu; In-Chul Hwang; Ara Cho; Sangyub Lee 004 (ISCAS, 2013)

An 180 nm CMOS 1.84-to-3.62 GHz fractional-N frequency synthesizer with skewed-reset PFD for removing noise-folding effect. - Sang-Geun Bae; Kyeong-Woo Kim; In-Chul Hwang (IEICE Electron. Express, 2014)

A 110-nm CMOS 0.7-V Input Transient-Enhanced Digital Low-Dropout Regulator With 99.98% Current Efficiency at 80-mA Load. - Tak-Jun Oh; In-Chul Hwang (IEEE Trans. Very Large Scale Integr. Syst., 2015)

All-Digital Duty-Cycle Corrector With a Wide Duty Correction Range for DRAM Applications. - Chan-Hui Jeong; Ammar Abdullah; Young-Jae Min; In-Chul Hwang; Soo-Won Kim (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Capacitorless Self-Clocked All-Digital Low-Dropout Regulator. - Muhammad Abrar Akram; Wook Hong; In-Chul Hwang (IEEE J. Solid State Circuits, 2019)

A 0.012mm2, 0.96-mW All-Digital Multiplying Delay-Locked Loop Based Frequency Synthesizer for GPS-L4 band. - Muhammad Abrar Akram; Myeong-Ho Lee; Dong-Hyeok Cho; In-Chul Hwang (ICCE, 2020)

Architectural Advancement of Digital Low-Dropout Regulators. - Muhammad Abrar Akram; In-Chul Hwang; Sohmyung Ha (IEEE Access, 2020)

Tomato Farm Environment Forecasting System Using Machine Learning. - Kyoung Tae Min; In-Chul Hwang (ICEIC, 2021)

Power Delivery Networks for Embedded Mobile SoCs: Architectural Advancements and Design Challenges. - Muhammad Abrar Akram; In-Chul Hwang; Sohmyung Ha (IEEE Access, 2021)

Capacitor-Less Dual-Mode All-Digital LDO With ΔΣ-Modulation-Based Ripple Reduction. - Muhammad Abrar Akram; Wook Hong; Sohmyung Ha; In-Chul Hwang (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 2.4/5 GHz Dual-Band Low-Noise and Highly Linear Receiver With a New Power-Efficient Feedforward OPAMP for WiFi-6 Applications. - Sukju Yun; Jaegeun Cho; Sengjun Jo; In-Chul Hwang; Youngjin Kim; Seongheon Jeong; Jungeun Lee; Sanghoon Lee; Keontae Kim; Seungyup Yoo; Sangwoo Han; Kuduck Kwon (IEEE Access, 2023)

A 40MHz Skewed Crystal Oscillator with Duty Cycle Corrector and Frequency Doubler for WIFI 6 in a 22nm CMOS. - Young-Ryul Yun; Jeong-Su Mok; In-Chul Hwang (ICEIC, 2024)

A Four-Phase Digital Buck Converter With MDLL-Based Adaptive Switching Frequency Compensation. - Muhammad Abrar Akram; Ibrar Ali Wahla; Kyung-Sung Kim; In-Chul Hwang (IEEE Access, 2024)

Fast Electrical Balance Duplexer Tuning Using Neural Networks for RF Self-Interference Cancellation in In-Band Full-Duplex Systems. - Hyunjin Kim; Kab Seok Ko; Kuduck Kwon; In-Chul Hwang; Seungyoung Park (IEEE Access, 2024)

A 65-nm duty-cycle corrector achieving 10% to 90% duty-correction range with 0.86% duty-cycle error. - Muhammad Abrar Akram; Ibrar Ali Wahla; Bo-Hyeon Lee; In-Chul Hwang (Microelectron. J., 2024)