A new charge pump without degradation in threshold voltage due to body effect [memory applications]. - Jongshin Shin; In-Young Chung; Young June Park; Hong-Shick Min (IEEE J. Solid State Circuits, 2000)

Design Techniques of Delay-Locked Loop for Jitter Minimization in DRAM Applications. - In-Young Chung; Youngsoo Sohn; Wonki Park; Changhyun Kim (IEICE Trans. Electron., 2005)

A Second Order Mixed-Mode Charge Pump Scheme for Low Phase/Duty Error and Low Power Consumption. - Kyu-Hyoun Kim; In-Young Chung (IEICE Trans. Electron., 2007)

New charge pump circuits for high output voltage and large current drivability. - In-Young Chung; Jongshin Shin (IEICE Electron. Express, 2009)

New Multiple-Times Programmable CMOS ROM Cell. - In-Young Chung; Seong Yeol Jeong; Sung Min Seo; Myungjin Lee; Taesu Jang; Seon-Yong Cha; Young June Park (IEICE Trans. Electron., 2012)