On the Synthesis of Gate Matrix Layout. - Reena Agarwal; Indranil Sengupta 001 (VLSI Design, 1994)

A class of two-dimensional cellular automata and their applications in random pattern testing. - Dipanwita Roy Chowdhury; Indranil Sengupta 001; Parimal Pal Chaudhuri (J. Electron. Test., 1994)

CA-Based Byte Error-Correcting Code. - Dipanwita Roy Chowdhury; Indranil Sengupta 001; Parimal Pal Chaudhuri (IEEE Trans. Computers, 1995)

A Design Technique of TSC Checker for Borden's Code. - Gosta Pada Biswas; Indranil Sengupta 001 (VLSI Design, 1997)

A genetic algorithm approach to high-level synthesis of digital circuits. - Indranil Sengupta 001; Neeraj Bhatia (Int. J. Syst. Sci., 1997)

Load Balancing with Multiple Token Policy. - Parag Kulkarni; Indranil Sengupta 001 (ICPADS, 2000)

A New Approach for Load Balancing Using Differential Load Measurement. - Parag A. Kulkarni; Indranil Sengupta 001 (ITCC, 2000)

An ASIC for Cellular Automata Based Message Authentication. - Prabir Dasgupta; Santanu Chattopadhyay; Indranil Sengupta 001 (VLSI Design, 2000)

Cellular Automata Based Deterministic Test Sequence Generator for Sequential Circuits. - Prabir Dasgupta; Santanu Chattopadhyay; Indranil Sengupta 001 (VLSI Design, 2000)

Theory and application of non-group cellular automata for message authentication. - Prabir Dasgupta; Santanu Chattopadhyay; Indranil Sengupta 001 (J. Syst. Archit., 2001)

Cellular Automata-Based Recursive Pseudoexhaustive Test Pattern Generator. - Prabir Dasgupta; Santanu Chattopadhyay; Parimal Pal Chaudhuri; Indranil Sengupta 001 (IEEE Trans. Computers, 2001)

New Scheme for Design of Static Virtual Topology in Wide Area Optical Networks. - Raja Datta; Sujoy Ghose; Indranil Sengupta 001 (IWDC, 2002)

An Adaptive Resource Reservation and Distributed Admission Control Scheme for Mobile Networks. - Hemanta Kumar Pati; Rajib Mall; Indranil Sengupta 001 (IWDC, 2002)

Reformatting Test Patterns for Testing Embedded Core Based System Using Test Access Mechanism (TAM) Switch. - Subhayu Basu; Debdeep Mukhopadhyay; Dipanwita Roy Chowdhury; Indranil Sengupta 001; Sudipta Bhawmik (ASP-DAC/VLSI Design, 2002)

An efficient bandwidth reservation and call admission control scheme for wireless mobile networks. - Hemanta Kumar Pati; Rajib Mall; Indranil Sengupta 001 (Comput. Commun., 2002)

An Integrated Approach to Testing Embedded Cores and Interconnects Using Test Access Mechanism (TAM) Switch. - Subhayu Basu; Indranil Sengupta 001; Dipanwita Roy Chowdhury; Sudipta Bhawmik (J. Electron. Test., 2002)

A rerouting technique with minimum traffic disruption for dynamic traffic in WDM networks. - Raja Datta; Sujoy Ghose; Indranil Sengupta 001 (ICON, 2003)

New Schemes for Connection Establishment in GMPLS Environment for WDM Networks. - Raja Datta; Ashok K. Turuk; Sujoy Ghose; Rajeev Kumar 004; Indranil Sengupta 001 (Int. J. Wirel. Opt. Commun., 2004)

An algorithm for optimal assignment of a wavelength in a tree topology and its application in WDM networks. - Raja Datta; Bivas Mitra; Sujoy Ghose; Indranil Sengupta 001 (IEEE J. Sel. Areas Commun., 2004)

A Unified Approach to Partial Scan Design using Genetic Algorithm. - Varun Arora; Indranil Sengupta 001 (Asian Test Symposium, 2005)

Autonomous Agent Based Distributed Fault-Tolerant Intrusion Detection System. - Jaydip Sen; Indranil Sengupta 001 (ICDCIT, 2005)

Dual and multiple token based approaches for load balancing. - Parag A. Kulkarni; Indranil Sengupta 001 (J. Syst. Archit., 2005)

Optimisation Problems Based on the Maximal Breach Path Measure for Wireless Sensor Network Coverage. - Anirvan DuttaGupta; Arijit Bishnu; Indranil Sengupta 001 (ICDCIT, 2006)

A Mechanism for Detection and Prevention of Distributed Denial of Service Attacks. - Jaydip Sen; Piyali Roy Chowdhury; Indranil Sengupta 001 (ICDCN, 2006)

A Unified Approach to Designing Reliable Network Topology. - Mounita Saha; Indranil Sengupta 001 (ICN/ICONS/MCL, 2006)

Maximal Breach in Wireless Sensor Networks: Geometric Characterization and Algorithms. - Anirvan DuttaGupta; Arijit Bishnu; Indranil Sengupta 001 (ALGOSENSORS, 2007)

An area optimized reconfigurable encryptor for AES-Rijndael. - Monjur Alam; Sonai Ray; Debdeep Mukhopadhyay; Santosh Ghosh; Dipanwita Roy Chowdhury; Indranil Sengupta 001 (DATE, 2007)

A Robust GF(p) Parallel Arithmetic Unit for Public Key Cryptography. - Santosh Ghosh; Monjur Alam; Indranil Sengupta 001; Dipanwita Roy Chowdhury (DSD, 2007)

A Distributed Trust Establishment Scheme for Mobile Ad Hoc Networks. - Jaydip Sen; Piyali Roy Chowdhury; Indranil Sengupta 001 (ICCTA, 2007)

A Key Establishment Scheme for Large-Scale Mobile Wireless Sensor Networks. - Ashok Kumar Das; Indranil Sengupta 001 (ICDCIT, 2007)

Two New Algorithms for Static Virtual Topology Design in Optical WDM Networks. - Raja Datta; Sujoy Ghose; Indranil Sengupta 001 (Int. J. Wirel. Opt. Commun., 2007)

Audio Watermarking Based on BCH Coding Using CT and DWT. - Vivekananda Bhat K.; Indranil Sengupta 001; Abhijit Das 004 (ICIT, 2008)

An effective group-based key establishment scheme for large-scale wireless sensor networks using bivariate polynomials. - Ashok Kumar Das; Indranil Sengupta 001 (COMSWARE, 2008)

A secure verifiable key agreement protocol for mobile conferencing. - Mounita Saha; Dipanwita Roy Chowdhury; Indranil Sengupta 001 (COMSWARE, 2008)

A GF(p) elliptic curve group operator resistant against side channel attacks. - Santosh Ghosh; Monjur Alam; Dipanwita Roy Chowdhury; Indranil Sengupta 001 (ACM Great Lakes Symposium on VLSI, 2008)

Routing and Wavelength Assignment in All Optical Networks Based on Clique Partitioning. - Tanmay De; Ajit Pal; Indranil Sengupta 001 (ICDCN, 2008)

A Multi Objective Evolutionary Algorithm Based Approach for Traffic Grooming, Routing and Wavelength Assignment in Optical WDM Networks. - Tanmay De; Puneet Jain; Ajit Pal; Indranil Sengupta 001 (ICIIS, 2008)

Audio Watermarking Based on Quantization in Wavelet Domain. - Vivekananda Bhat K.; Indranil Sengupta 001; Abhijit Das 004 (ICISS, 2008)

A genetic algorithm based approach for traffic grooming, routing and wavelength assignment in optical WDM mesh networks. - Tanmay De; Puneet Jain; Ajit Pal; Indranil Sengupta 001 (ICON, 2008)

Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm. - Monjur Alam; Santosh Ghosh; Dipanwita Roy Chowdhury; Indranil Sengupta 001 (VLSI Design, 2008)

Enhancing file data security in linux operating system by integrating secure file system. - Rajesh Kumar Pal; Indranil Sengupta 001 (CICS, 2009)

A Trust Based Clustering Framework for Securing Ad Hoc Networks. - Pushpita Chatterjee; Indranil Sengupta 001; Soumya Kanti Ghosh 001 (ICISTM, 2009)

Parallel crypto-devices for GF(p) elliptic curve multiplication resistant against side channel attacks. - Santosh Ghosh; Monjur Alam; Dipanwita Roy Chowdhury; Indranil Sengupta 001 (Comput. Electr. Eng., 2009)

Effect of glitches against masked AES S-box implementation and countermeasure. - Monjur Alam; Santosh Ghosh; M. J. Mohan; Debdeep Mukhopadhyay; Dipanwita Roy Chowdhury; Indranil Sengupta 001 (IET Inf. Secur., 2009)

A Distributed Trust Model for Securing Mobile Ad Hoc Networks. - Pushpita Chatterjee; Indranil Sengupta 001; Soumya Kanti Ghosh 001 (EUC, 2010)

Verifiable (t, n) Threshold Secret Sharing Scheme Using ECC Based Signcryption. - Atanu Basu; Indranil Sengupta 001 (ICISTM, 2010)

Secret Sharing and Proactive Renewal of Shares in Hierarchical Groups - Ruchira Naskar; Indranil Sengupta 001 (CoRR, 2010)

An adaptive audio watermarking based on the singular value decomposition in the wavelet domain. - Vivekananda Bhat K.; Indranil Sengupta 001; Abhijit Das 004 (Digit. Signal Process., 2010)

Traffic grooming, routing, and wavelength assignment in an optical WDM mesh networks based on clique partitioning. - Tanmay De; Ajit Pal; Indranil Sengupta 001 (Photonic Netw. Commun., 2010)

FPGA implementation of binary edwards curve usingternary representation. - Ayantika Chatterjee; Indranil Sengupta 001 (ACM Great Lakes Symposium on VLSI, 2011)

Secured Cloud Storage Scheme Using ECC Based Key Management in User Hierarchy. - Atanu Basu; Indranil Sengupta 001; Jamuna Kanta Sing (ICISS, 2011)

Multiple Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization. - Subhadip Kundu; Santanu Chattopadhyay; Indranil Sengupta 001; Rohit Kapur (VLSI Design, 2011)

A New Audio Watermarking Scheme Based on Singular Value Decomposition and Quantization. - Vivekananda Bhat K.; Indranil Sengupta 001; Abhijit Das 004 (Circuits Syst. Signal Process., 2011)

An audio watermarking scheme using singular value decomposition and dither-modulation quantization. - Vivekananda Bhat K.; Indranil Sengupta 001; Abhijit Das 004 (Multim. Tools Appl., 2011)

Improved secure dynamic key management scheme with access control in user hierarchy. - Atanu Basu; Indranil Sengupta 001 (DICTAP, 2012)

FPGA implementation of extended reconfigurable Binary Edwards Curve based processor. - Ayantika Chatterjee; Indranil Sengupta 001 (ICNC, 2012)

Particle Swarm Optimization Based Circuit Synthesis of Reversible Logic. - Kamalika Datta; Indranil Sengupta 001; Hafizur Rahaman 001 (ISED, 2012)

High-Speed Unified Elliptic Curve Cryptosystem on FPGAs Using Binary Huff Curves. - Ayantika Chatterjee; Indranil Sengupta 001 (VDAT, 2012)

Particle Swarm Optimization Based BIST Design for Memory Cores in Mesh Based Network-on-Chip. - Bibhas Ghoshal; Subhadip Kundu; Indranil Sengupta 001; Santanu Chattopadhyay (VDAT, 2012)

An Efficient Technique for Longest Prefix Matching in Network Routers. - Rekha Govindaraj; Indranil Sengupta 001; Santanu Chattopadhyay (VDAT, 2012)

Synthesis of Reversible Circuits Using Heuristic Search Method. - Kamalika Datta; Gaurav Rathi; Indranil Sengupta 001; Hafizur Rahaman 001 (VLSI Design, 2012)

A Diagnosability Metric for Test Set Selection Targeting Better Fault Detection. - Subhadip Kundu; Santanu Chattopadhyay; Indranil Sengupta 001; Rohit Kapur (VLSI Design, 2012)

Design for Security of Block Cipher S-Boxes to Resist Differential Power Attacks. - Bodhisatwa Mazumdar; Debdeep Mukhopadhyay; Indranil Sengupta 001 (VLSI Design, 2012)

STACRP: a secure trusted auction oriented clustering based routing protocol for MANET. - Pushpita Chatterjee; Indranil Sengupta 001; Soumya Kanti Ghosh 001 (Clust. Comput., 2012)

Constrained Search for a Class of Good S-Boxes with Improved DPA Resistivity. - Bodhisatwa Mazumdar; Debdeep Mukhopadhyay; Indranil Sengupta 001 (IACR Cryptol. ePrint Arch., 2012)

An efficient routing technique for mesh-of-tree-based NoC and its performance comparison. - Kanchan Manna; Santanu Chattopadhaya; Indranil Sengupta 001 (Int. J. High Perform. Syst. Archit., 2012)

Design of a high performance Binary Edwards Curve based processor secured against side channel analysis. - Ayantika Chatterjee; Indranil Sengupta 001 (Integr., 2012)

Secured hierarchical secret sharing using ECC based signcryption. - Atanu Basu; Indranil Sengupta 001; Jamuna Kanta Sing (Secur. Commun. Networks, 2012)

An ATE assisted DFD technique for volume diagnosis of scan chains. - Subhadip Kundu; Santanu Chattopadhyay; Indranil Sengupta 001; Rohit Kapur (DAC, 2013)

A Distributed BIST Scheme for NoC-Based Memory Cores. - Bibhas Ghoshal; Indranil Sengupta 001 (DSD, 2013)

Reversible logic implementation of AES algorithm. - Kamalika Datta; Vishal Shrivastav; Indranil Sengupta 001; Hafizur Rahaman 001 (DTIS, 2013)

Aggresive scan chain masking for improved diagnosis of multiple scan chain failures. - Subhadip Kundu; Santanu Chattopadhyay; Indranil Sengupta 001; Rohit Kapur (ETS, 2013)

Design and implementation of rotation symmetric S-boxes with high nonlinearity and high DPA resilience. - Bodhisatwa Mazumdar; Debdeep Mukhopadhyay; Indranil Sengupta 001 (HOST, 2013)

An evolutionary approach to reversible logic synthesis using output permutation. - Kamalika Datta; Indranil Sengupta 001; Hafizur Rahaman 001; Rolf Drechsler (IDT, 2013)

Accelerating Sorting of Fully Homomorphic Encrypted Data. - Ayantika Chatterjee; Manish Kaushal; Indranil Sengupta 001 (INDOCRYPT, 2013)

Re-using Refresh for Self-Testing DRAMs. - Bibhas Ghoshal; Chittaranjan Mandal 002; Indranil Sengupta 001 (ISED, 2013)

Exploiting Negative Control Lines in the Optimization of Reversible Circuits. - Kamalika Datta; Gaurav Rathi; Robert Wille; Indranil Sengupta 001; Hafizur Rahaman 001; Rolf Drechsler (RC, 2013)

Preemptive Test Scheduling for Network-on-Chip Using Particle Swarm Optimization. - Kanchan Manna; Shailesh Singh; Santanu Chattopadhyay; Indranil Sengupta 001 (VDAT, 2013)

First-order DPA Vulnerability of Rijndael: Security and Area-delay Optimization Trade-off. - Monjur Alam; Santosh Ghosh; Dipanwita Roy Chowdhury; Indranil Sengupta 001 (Int. J. Netw. Secur., 2013)

Cryptosystem for Secret Sharing Scheme with Hierarchical Groups. - Atanu Basu; Indranil Sengupta 001; Jamuna Kanta Sing (Int. J. Netw. Secur., 2013)

Particle Swarm Optimization Based Reversible Circuit Synthesis Using Mixed Control Toffoli Gates. - Kamalika Datta; Indranil Sengupta 001; Hafizur Rahaman 001 (J. Low Power Electron., 2013)

Partial encryption and watermarking scheme for audio files with controlled degradation of quality. - Kamalika Datta; Indranil Sengupta 001 (Multim. Tools Appl., 2013)

A Metric for Test Set Characterization and Customization Toward Fault Diagnosis. - Subhadip Kundu; Sankhadeep Pal; Santanu Chattopadhyay; Indranil Sengupta 001; Rohit Kapur (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Constrained Search for a Class of Good Bijective S-Boxes With Improved DPA Resistivity. - Bodhisatwa Mazumdar; Debdeep Mukhopadhyay; Indranil Sengupta 001 (IEEE Trans. Inf. Forensics Secur., 2013)

An ESOP-Based Reversible Circuit Synthesis Flow Using Simulated Annealing. - Kamalika Datta; Alhaad Gokhale; Indranil Sengupta 001; Hafizur Rahaman 001 (ACSS (2), 2014)

Optimizing DD-based synthesis of reversible circuits using negative control lines. - Eleonora Schönborn; Kamalika Datta; Robert Wille; Indranil Sengupta 001; Hafizur Rahaman 001; Rolf Drechsler (DDECS, 2014)

BDD based synthesis of Boolean functions using memristors. - Sayak Chakraborti; Paturi Varun Chowdhary; Kamalika Datta; Indranil Sengupta 001 (IDT, 2014)

Through silicon via placement and mapping strategy for 3D mesh based Network-on-Chip. - Kanchan Manna; Santanu Chattopadhyay; Indranil Sengupta 001 (VLSI-SoC, 2014)

All Optical Reversible Multiplexer Design Using Mach-Zehnder Interferometer. - Kamalika Datta; Indranil Sengupta 001 (VLSID, 2014)

Approach for modelling trust in cluster-based wireless ad hoc networks. - Pushpita Chatterjee; Uttam Ghosh; Indranil Sengupta 001; Soumya Kanti Ghosh 001 (IET Networks, 2014)

An Improved Reversible Circuit Synthesis Approach using Clustering of ESOP Cubes. - Kamalika Datta; Gaurav Rathi; Indranil Sengupta 001; Hafizur Rahaman 001 (ACM J. Emerg. Technol. Comput. Syst., 2014)

An Approach to Reversible Logic Synthesis Using Input and Output Permutations. - Kamalika Datta; Indranil Sengupta 001; Hafizur Rahaman 001; Rolf Drechsler (Trans. Comput. Sci., 2014)

Framework for Multiple-Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization. - Subhadip Kundu; Aniket Jha; Santanu Chattopadhyay; Indranil Sengupta 001; Rohit Kapur (IEEE Trans. Very Large Scale Integr. Syst., 2014)

A trust enhanced secure clustering framework for wireless ad hoc networks. - Pushpita Chatterjee; Uttam Ghosh; Indranil Sengupta 001; Soumya Kanti Ghosh 001 (Wirel. Networks, 2014)

Windowing technique for Lazy Sorting of Encrypted data. - Ayantika Chatterjee; Indranil Sengupta 001 (CNS, 2015)

Fast Qubit Placement in 2D Architecture Using Nearest Neighbor Realization. - Ritu Ranjan Shrivastwa; Kamalika Datta; Indranil Sengupta 001 (iNIS, 2015)

TSV Placement and Core Mapping for 3D Mesh Based Network-on-Chip Design Using Extended Kernighan-Lin Partitioning. - Kanchan Manna; Vadapalli Shanmukha Sri Teja; Santanu Chattopadhyay; Indranil Sengupta 001 (ISVLSI, 2015)

Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits. - Abhoy Kole; Kamalika Datta; Indranil Sengupta 001; Robert Wille (RC, 2015)

GA based diagnostic test pattern generation for transition faults. - Anupam Bhar; Santanu Chattopadhyay; Indranil Sengupta 001; Rohit Kapur (VDAT, 2015)

BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits. - Eleonora Schönborn; Kamalika Datta; Robert Wille; Indranil Sengupta 001; Hafizur Rahaman 001; Rolf Drechsler (VLSID, 2015)

Construction of RSBFs with improved cryptographic properties to resist differential fault attack on grain family of stream ciphers. - Bodhisatwa Mazumdar; Debdeep Mukhopadhyay; Indranil Sengupta 001 (Cryptogr. Commun., 2015)

FURISC: FHE Encrypted URISC Design. - Ayantika Chatterjee; Indranil Sengupta 001 (IACR Cryptol. ePrint Arch., 2015)

Searching and Sorting of Fully Homomorphic Encrypted Data on Cloud. - Ayantika Chatterjee; Indranil Sengupta 001 (IACR Cryptol. ePrint Arch., 2015)

Thermal-aware multifrequency network-on-chip testing using particle swarm optimisation. - Kanchan Manna; Chakradhar Reddy Veeramreddy; Santanu Chattopadhyay; Indranil Sengupta 001 (Int. J. High Perform. Syst. Archit., 2015)

All optical design of binary adders using semiconductor optical amplifier assisted Mach-Zehnder interferometer. - Kamalika Datta; Tanay Chattopadhyay; Indranil Sengupta 001 (Microelectron. J., 2015)

A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines. - Kamalika Datta; Indranil Sengupta 001; Hafizur Rahaman 001 (IEEE Trans. Computers, 2015)

Scan Chain Masking for Diagnosis of Multiple Chain Failures in a Space Compaction Environment. - Subhadip Kundu; Santanu Chattopadhyay; Indranil Sengupta 001; Rohit Kapur (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Area efficient implementation of ripple carry adder using memristor crossbar arrays. - Phrangboklang Lyngton Thangkhiew; Rahul Gharpinde; Varun Chowdhary Paturi; Kamalika Datta; Indranil Sengupta 001 (IDT, 2016)

An improved gate library for logic synthesis of optical circuits. - Shuchishman Burman; Kamalika Datta; Robert Wille; Indranil Sengupta 001; Rolf Drechsler (ISED, 2016)

Thermal-Aware Design and Test Techniques for Two-and Three-Dimensional Networks-on-Chip. - Kanchan Manna; Santanu Chattopadhyay; Indranil Sengupta 001 (ISVLSI, 2016)

Thermal-Aware Preemptive Test Scheduling for Network-on-Chip Based 3D ICs. - Kanchan Manna; Chatla Swamy Sagar; Santanu Chattopadhyay; Indranil Sengupta 001 (ISVLSI, 2016)

A Heuristic for Linear Nearest Neighbor Realization of Quantum Circuits by SWAP Gate Insertion Using N-Gate Lookahead. - Abhoy Kole; Kamalika Datta; Indranil Sengupta 001 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2016)

Small Test Set Generation with High Diagnosability. - Anupam Bhar; Santanu Chattopadhyay; Indranil Sengupta 001; Rohit Kapur (J. Circuits Syst. Comput., 2016)

Integrated Through-Silicon Via Placement and Application Mapping for 3D Mesh-Based NoC Design. - Kanchan Manna; Shivam Swami; Santanu Chattopadhyay; Indranil Sengupta 001 (ACM Trans. Embed. Comput. Syst., 2016)

In-Field Test for Permanent Faults in FIFO Buffers of NoC Routers. - Bibhas Ghoshal; Kanchan Manna; Santanu Chattopadhyay; Indranil Sengupta 001 (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Reservoir and mixer constrained scheduling for sample preparation on digital microfluidic biochips. - Varsha Agarwal; Ananya Singla; Mahammad Samiuddin; Sudip Roy 001; Tsung-Yi Ho; Indranil Sengupta 001; Bhargab B. Bhattacharya (ASP-DAC, 2017)

Exact Synthesis of Ternary Reversible Functions Using Ternary Toffoli Gates. - Abhoy Kole; P. Mercy Nesa Rani; Kamalika Datta; Indranil Sengupta 001; Rolf Drechsler (ISMVL, 2017)

Test Pattern Generation Effort Evaluation of Reversible Circuits. - Abhoy Kole; Robert Wille; Kamalika Datta; Indranil Sengupta 001 (RC, 2017)

Design of Efficient Quantum Circuits Using Nearest Neighbor Constraint in 2D Architecture. - Leniency Marbaniang; Abhoy Kole; Kamalika Datta; Indranil Sengupta 001 (RC, 2017)

Improved Decomposition of Multiple-Control Ternary Toffoli Gates Using Muthukrishnan-Stroud Quantum Gates. - P. Mercy Nesa Rani; Abhoy Kole; Kamalika Datta; Indranil Sengupta 001 (RC, 2017)

A New Logic Encryption Strategy Ensuring Key Interdependency. - Rajit Karmakar; N. Prasad 001; Santanu Chattopadhyay; Rohit Kapur; Indranil Sengupta 001 (VLSID, 2017)

Refresh re-use based transparent test for detection of in-field permanent faults in DRAMs. - Bibhas Ghoshal; Chittaranjan Mandal 002; Indranil Sengupta 001 (Integr., 2017)

A New Object Searching Protocol for Multi-tag RFID. - Subhasish Dhal; Indranil Sengupta 001 (Wirel. Pers. Commun., 2017)

Modelling and Simulation of Non-Ideal MAGIC NOR Gates on Memristor Crossbar. - Naveen Murali G; F. Lalchhandama; Kamalika Datta; Indranil Sengupta 001 (ISED, 2018)

Generalizing the Concept of Scalable Reversible Circuit Synthesis for Multiple-Valued Logic. - Alwin Zulehner; P. Mercy Nesa Rani; Kamalika Datta; Indranil Sengupta 001; Robert Wille (ISMVL, 2018)

Secure Cloud Storage Scheme Based On Hybrid Cryptosystem. - Atanu Basu; Indranil Sengupta 001 (IACR Cryptol. ePrint Arch., 2018)

Thermal-Aware Application Mapping Strategy for Network-on-Chip Based System Design. - Kanchan Manna; Priyajit Mukherjee; Santanu Chattopadhyay; Indranil Sengupta 001 (IEEE Trans. Computers, 2018)

A New Heuristic for N-Dimensional Nearest Neighbor Realization of a Quantum Circuit. - Abhoy Kole; Kamalika Datta; Indranil Sengupta 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Translating Algorithms to Handle Fully Homomorphic Encrypted Data on the Cloud. - Ayantika Chatterjee; Indranil Sengupta 001 (IEEE Trans. Cloud Comput., 2018)

A Scalable In-Memory Logic Synthesis Approach Using Memristor Crossbar. - Rahul Gharpinde; Phrangboklang Lyngton Thangkhiew; Kamalika Datta; Indranil Sengupta 001 (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A staircase structure for scalable and efficient synthesis of memristor-aided logic. - Alwin Zulehner; Kamalika Datta; Indranil Sengupta 001; Robert Wille (ASP-DAC, 2019)

Fault Coverage Enhancement via Weighted Random Pattern Generation in BIST Using a DNN-Driven-PSO Approach. - Hillol Maity; Kaushik Khatua; Santanu Chattopadhyay; Indranil Sengupta 001; Girish Patankar; Parthajit Bhattacharya (ICIT, 2019)

A Deep Neural Network Augmented Approach for Fixed Polarity AND-XOR Network Synthesis. - Kaushik Khatua; Hillol Maity; Santanu Chattopadhyay; Indranil Sengupta 001; Girish Patankar; Parthajit Bhattacharya (TENCON, 2019)

Exploiting Negative Control Lines and Nearest Neighbor for Improved Comparator Design. - Tathagato Bose; Kamalika Datta; Indranil Sengupta 001 (VLSID, 2019)

Design and Implementation of Threshold Logic Functions Using Memristors. - Yaswanth Krishna Yadav Danaboina; Pravanjan Samanta; Kamalika Datta; Indrajit Chakrabarti; Indranil Sengupta 001 (VLSID, 2019)

Mapping of Boolean Logic Functions onto 3D Memristor Crossbar. - Naveen Murali G; Peddireddi Satya Vardhan; F. Lalchhandama; Kamalika Datta; Indranil Sengupta 001 (VLSID, 2019)

Scheduling algorithms for reservoir- and mixer-aware sample preparation with microfluidic biochips. - Varsha Agarwal; Ananya Singla; Mahammad Samiuddin; Sudip Roy 001; Tsung-Yi Ho; Indranil Sengupta 001; Bhargab B. Bhattacharya (Integr., 2019)

Thermal-aware Test Scheduling Strategy for Network-on-Chip based Systems. - Kanchan Manna; Chatla Swami Sagar; Santanu Chattopadhyay; Indranil Sengupta 001 (ACM J. Emerg. Technol. Comput. Syst., 2019)

A New Test Vector Reordering Technique for Low Power Combinational Circuit Testing. - Hillol Maity; Kaushik Khatua; Santanu Chattopadhyay; Indranil Sengupta 001; Girish Patankar; Parthajit Bhattacharya (ISDCS, 2020)

An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD). - Phrangboklang Lyngton Thangkhiew; Alwin Zulehner; Robert Wille; Kamalika Datta; Indranil Sengupta 001 (Integr., 2020)

Improved Mapping of Quantum Circuits to IBM QX Architectures. - Abhoy Kole; Stefan Hillmich; Kamalika Datta; Robert Wille; Indranil Sengupta 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Sorting of Fully Homomorphic Encrypted Cloud Data: Can Partitioning be Effective? - Ayantika Chatterjee; Indranil Sengupta 001 (IEEE Trans. Serv. Comput., 2020)

A Deep Neural Network Guided Testing Approach for Finite State Machines. - Habibur Rahaman; Santanu Chattopadhyay; Indranil Sengupta 001 (ISDCS, 2021)

Efficient Construction of Functional Representations for Quantum Algorithms. - Lukas Burgholzer; Rudy Raymond; Indranil Sengupta 001; Robert Wille (RC, 2021)

Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles. - Kamalika Datta; Saeideh Shirinzadeh; Phrangboklang Lyngton Thangkhiew; Indranil Sengupta 001; Rolf Drechsler (DSD, 2022)

SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library. - Abhoy Kole; Kamalika Datta; Indranil Sengupta 001; Rolf Drechsler (DSD, 2022)

Mapping Quantum Circuits to 2-Dimensional Quantum Architectures. - Kamalika Datta; Abhoy Kole; Indranil Sengupta 001; Rolf Drechsler (GI-Jahrestagung, 2022)

Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit Architecture. - Kamalika Datta; Abhoy Kole; Indranil Sengupta 001; Rolf Drechsler (ISMVL, 2022)

Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant Applications. - Kamalika Datta; Saman Fröhlich; Saeideh Shirinzadeh; Dev Narayan Yadav; Indranil Sengupta 001; Rolf Drechsler (VLSI-SoC, 2022)

Easily-Verifiable Design of Non-Scan Sequential Machines for Conformance Checking. - Habibur Rahaman; Santanu Chattopadhyay; Indranil Sengupta 001; Debesh K. Das; Bhargab B. Bhattacharya (VLSID, 2022)

FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications. - Dev Narayan Yadav; Phrangboklang Lyngton Thangkhiew; Kamalika Datta; Sandip Chakraborty 001; Rolf Drechsler; Indranil Sengupta 001 (J. Electron. Test., 2022)

In-Memory Computing on Resistive RAM Systems Using Majority Operation. - F. Lalchhandama; Mukesh Sahani; Vompolu Mohan Srinivas; Indranil Sengupta 001; Kamalika Datta (J. Circuits Syst. Comput., 2022)

Conformance Testing for Finite State Machines Guided by Deep Neural Network. - Habibur Rahaman; Santanu Chattopadhyay; Indranil Sengupta 001 (J. Circuits Syst. Comput., 2022)

CoMIC: Complementary Memristor based in-memory computing in 3D architecture. - F. Lalchhandama; Kamalika Datta; Sandip Chakraborty 001; Rolf Drechsler; Indranil Sengupta 001 (J. Syst. Archit., 2022)

Feed-Forward learning algorithm for resistive memories. - Dev Narayan Yadav; Phrangboklang Lyngton Thangkhiew; Kamalika Datta; Sandip Chakraborty 001; Rolf Drechsler; Indranil Sengupta 001 (J. Syst. Archit., 2022)

An Analysis of Fault Diagnosis Approaches in Memristor Crossbar Array. - Dev Narayan Yadav; Phrangboklang Lyngton Thangkhiew; Indranil Sengupta 001 (iSES, 2023)

Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture. - Kamalika Datta; Abhoy Kole; Indranil Sengupta 001; Rolf Drechsler (RC, 2023)

Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures. - Abhoy Kole; Kamalika Datta; Philipp Niemann 001; Indranil Sengupta 001; Rolf Drechsler (RC, 2023)

Improving Self-Fault-Tolerance Capability of Memristor Crossbar Using a Weight-Sharing Approach. - Dev Narayan Yadav; Phrangboklang Lyngton Thangkhiew; F. Lalchhandama; Kamalika Datta; Rolf Drechsler; Indranil Sengupta 001 (ATS, 2024)

Exploiting the Extended Neighborhood of Hexagonal Qubit Architecture for Mapping Quantum Circuits. - Abhoy Kole; Kamalika Datta; Indranil Sengupta 001; Rolf Drechsler (ACM J. Emerg. Technol. Comput. Syst., 2024)

Unlocking the Benefits of Dynamic Quantum Circuits in Resource Constraint Architecture. - Abhoy Kole; Mohammed E. Djeridane; Arighna Deb; Kamalika Datta; Indranil Sengupta 001; Rolf Drechsler (ISVLSI, 2025)