High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers. - Ing-Jer Huang; Alvin M. Despain (DAC, 1992)

Application-Driven Design Automation for Microprocessor Design. - Iksoo Pyo; Ching-Long Su; Ing-Jer Huang; Kuo-Rueih Pan; Yong-Seon Koh; Chi-Ying Tsui; Hsu-Tsun Chen; Gino Cheng; Shihming Liu; Shiqun Wu; Alvin M. Despain (DAC, 1992)

Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors. - Ing-Jer Huang; Alvin M. Despain (ICCAD, 1993)

An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors. - Ing-Jer Huang; Alvin M. Despain (MICRO, 1993)

Synthesis of Instruction Sets for Pipelined Microprocessors. - Ing-Jer Huang; Alvin M. Despain (DAC, 1994)

Generating instruction sets and microarchitectures from applications. - Ing-Jer Huang; Alvin M. Despain (ICCAD, 1994)

Synthesis of application specific instruction sets. - Ing-Jer Huang; Alvin M. Despain (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

Synthesis and analysis of an industrial embedded microcontroller. - Ing-Jer Huang; Li-Rong Wang; Yu-Min Wang (ASP-DAC, 1997)

Analysis of ×86 instruction set usage for DOS/Windows applications and its implication on superscalar design. - Ing-Jer Huang; Tzu-Chin Peng (ICCD, 1998)

Application of Instruction Analysis/Synthesis Tools to x86's Functional Unit Allocation. - Ing-Jer Huang; Ping-Huei Xie (ISSS, 1998)

A Case Study: Synthesis and Exploration of Instruction Set Design for Application-Specific Symbolic Computing. - Ing-Jer Huang (J. Inf. Sci. Eng., 1998)

ICEBERG: An Embedded In-Circuit Emulator Synthesizer for Microcontrollers. - Ing-Jer Huang; Tai-An Lu (DAC, 1999)

Automatic Simulation and Verification of Pipelined Microcontrollers. - Ing-Jer Huang; Li-Rong Wang (J. Inf. Sci. Eng., 1999)

A new approach to assembly software retargeting for microcontrollers. - Ing-Jer Huang; Dao-Zhen Chen (ASP-DAC, 2000)

A Machine State Transition Approach to Instruction Retargeting for Embedded Microprocessors. - Ing-Jer Huang; Wen-Fu Kao (Des. Autom. Embed. Syst., 2000)

Parameterized MAC unit implementation. - Ming-Chih Chen; Ing-Jer Huang; Chung-Ho Chen (ASP-DAC, 2001)

Reusable embedded in-circuit emulator. - Ing-Jer Huang; Hsin-Ming Chen; Chung-Fu Kao (ASP-DAC, 2001)

Co-synthesis of pipelined structures and instruction reordering constraints for instruction set processors. - Ing-Jer Huang (ACM Trans. Design Autom. Electr. Syst., 2001)

A Retargetable Embedded In-Circuit Emulation Module for Microprocessors. - Ing-Jer Huang; Chung-Fu Kao; Hsin-Ming Chen; Ching-Nan Juan; Tai-An Lu (IEEE Des. Test Comput., 2002)

Design Exploration of an Industrial Embedded Microcontroller: Performance, Cost and Software Compatibility. - Ing-Jer Huang; Li-Rong Wang; Yu-Min Wang; Tai-An Lu (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors. - Ing-Jer Huang; Ping-Huei Xie (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Reconfigurable real-time address trace compressor for embedded microprocessors. - Shyh-Ming Huang; Ing-Jer Huang; Chung-Fu Kao (FPT, 2003)

Automatic Assembly Program Retargeting for Micrco controllers. - Ing-Jer Huang; Dao-Zhen Chen (J. Inf. Sci. Eng., 2003)

Mining Correlations of Human Gene Expression from Digital Gene Expression Profiles. - Ing-Jer Huang; Dao-Zhen Chen (J. Inf. Sci. Eng., 2003)

A cost-effective media processor for embedded applications [audio decoder example]. - Wen-Kai Huang; I-Ting Lin; Shi-Wei Chen; Ing-Jer Huang (ISCAS (6), 2005)

Design of a Dynamic PCM Selector for Non-deterministic Environment. - Liang-Bi Chen; Ing-Jer Huang; Yuan-Long Jeang (APCCAS, 2006)

Configurable AMBA On-Chip Real-Time Signal Tracer. - Chung-Fu Kao; Chi-Hung Lin; Ing-Jer Huang (ASP-DAC, 2007)

An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor Compatible with ARM7 Software Tools. - Fu-Ching Yang; Ing-Jer Huang (ASP-DAC, 2007)

An Embedded Multi-resolution AMBA Trace Analyzer for Microprocessor-based SoC Integration. - Chung-Fu Kao; Ing-Jer Huang; Chi-Hung Lin (DAC, 2007)

Automatic Verification of External Interrupt Behaviors for Microprocessor Design. - Fu-Ching Yang; Wen-Kai Huang; Ing-Jer Huang (DAC, 2007)

SystemC-Based Design Space Exploration of a 3D Graphics Acceleration SoC for Consumer Electronics. - Tse-Chen Yeh; Tsung-Yu Ho; Hung-Yu Chen; Ing-Jer Huang (EUC, 2007)

The AES Design Space Exploration with a Soft IP Generator. - Liang-Bi Chen; Ching-Chi Hu; Yen-Ling Chen; Chi-Wei Chu; Ing-Jer Huang (IIH-MSP, 2007)

A Hardware Approach to Real-Time Program Trace Compression for Embedded Processors. - Chung-Fu Kao; Shyh-Ming Huang; Ing-Jer Huang (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

On-Chip-Network cryptosystem: A high throughput and high security architecture. - Chung-Ping Young; Chung-Chu Chia; Liang-Bi Chen; Ing-Jer Huang (APCCAS, 2008)

Parameterized embedded in-circuit emulator and its retargetable debugging software for microprocessor/microcontroller/DSP processor. - Liang-Bi Chen; Yung-Chih Liu; Chen-Hung Chen; Chung-Fu Kao; Ing-Jer Huang (ASP-DAC, 2008)

A multi-resolution AHB bus tracer for real-time compression of forward/backward traces in a circular buffer. - Yi-Ting Lin; Wen-Chi Shiue; Ing-Jer Huang (DAC, 2008)

Verifying external interrupts of embedded microprocessor in SoC with on-chip bus. - Fu-Ching Yang; Jing-Kun Zhong; Ing-Jer Huang (ICCAD, 2008)

NCPA: A Scheduling Algorithm for Multi-cipher and Multi-mode Reconfigurable Cryptosystem. - Chung-Ping Young; Chung-Chu Chia; Liang-Bi Chen; Ing-Jer Huang (IIH-MSP, 2008)

AMBA AHB bus potocol checker with efficient debugging mechanism. - Yi-Ting Lin; Chien-Chou Wang; Ing-Jer Huang (ISCAS, 2008)

Hardware-Software Approaches to In-Circuit Emulation for Embedded Processors. - Chung-Fu Kao; Hsin-Ming Chen; Ing-Jer Huang (IEEE Des. Test Comput., 2008)

Automatic Verification of External Interrupt Behaviors for Microprocessor Design. - Fu-Ching Yang; Wen-Kai Huang; Jing-Kun Zhong; Ing-Jer Huang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. - Liang-Bi Chen; Ruei-Ting Gu; Wei-Sheng Huang; Chien-Chou Wang; Wen-Chi Shiue; Tsung-Yu Ho; Yun-Nan Chang; Shen-Fu Hsiao; Chung-Nan Lee; Ing-Jer Huang (ASP-DAC, 2009)

A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilization. - Fu-Ching Yang; Cheng-Lung Chiang; Ing-Jer Huang (ASP-DAC, 2009)

A trace-capable instruction cache for cost efficient real-time program trace compression in SoC. - Chun-Hung Lai; Fu-Ching Yang; Chung-Fu Kao; Ing-Jer Huang (DAC, 2009)

A Reverse-encoding-based On-chip AHB Bus Tracer Supporting both Post-T and Pre-T Trace. - Fu-Ching Yang; Cheng-Lung Chiang; Ing-Jer Huang (ISCAS, 2009)

A System-Level Model of Design Space Exploration for a Tile-Based 3D Graphics SoC Refinement. - Liang-Bi Chen; Chi-Tsai Yeh; Hung-Yu Chen; Ing-Jer Huang (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

An embedded debugging/performance monitoring engine for a tile-based 3D graphics SoC development. - Liang-Bi Chen; Tsung-Yu Ho; Jiun-Cheng Ju; Cheng-Lung Chiang; Chung-Nan Lee; Ing-Jer Huang (ASP-DAC, 2010)

HPChecker: An AMBA AHB On-Chip Bus Protocol Checker with Efficient Verification Mechanisms. - Liang-Bi Chen; Jiun-Cheng Ju; Chien-Chou Wang; Ing-Jer Huang (IEICE Trans. Inf. Syst., 2010)

A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization. - Fu-Ching Yang; Cheng-Lung Chiang; Ing-Jer Huang (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Internet-based hardware/software co-design framework for embedded 3D graphics applications. - Chi-Tsai Yeh; Chun-Hao Wang; Ing-Jer Huang; Weng-Fai Wong (EURASIP J. Adv. Signal Process., 2011)

A Real-Time Power Analysis Platform for Power-Aware Embedded System Development. - Liang-Bi Chen; Yen-Ling Chen; Ing-Jer Huang (J. Inf. Sci. Eng., 2011)

A Trace-Capable Instruction Cache for Cost-Efficient Real-Time Program Trace Compression in SoC. - Chun-Hung Lai; Fu-Ching Yang; Ing-Jer Huang (IEEE Trans. Computers, 2011)

An On-Chip AHB Bus Tracer With Real-Time Compression and Dynamic Multiresolution Supports for SoC. - Fu-Ching Yang; Yi-Ting Lin; Chung-Fu Kao; Ing-Jer Huang (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A performance monitoring tool suite for 3D graphics SoC application. - Yi-Hao Chang; Chi-Tsai Yeh; Ing-Jer Huang; Shau-Yin Tseng (APCCAS, 2012)

An OCP-AHB bus wrapper with built-in ICE support for SOC integration. - Cheng-Ta Wu; Feng-Xiang Huang; Kuan-Fu Kuo; Ing-Jer Huang (VLSI-DAT, 2012)

Reconfigurable Bus Monitor Tool Suite for on-chip SoC for performance and protocol monitoring. - Ping-Chun Lee; Ing-Jer Huang (ReCoSoC, 2014)

A Versatile Data Cache for Trace Buffer Support. - Chun-Hung Lai; Yun-Chung Yang; Ing-Jer Huang (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

An OpenGL ES 2.0 3D graphics SoC with versatile HW/SW development support. - Hsu-Kang Dow; Ching-Hua Huang; Chun-Hung Lai; Kai-Hsiang Tsao; Sheng-Chih Tseng; Kun-Yi Wu; Ting-Hsuan Wu; Ho-Chun Yang; Da-Jing Zhang-Jian; Yun-Nan Chang; Steve Haga; Shen-Fu Hsiao; et al. (VLSI-DAT, 2015)

A unified GDB-based source-transaction level SW/HW co-debugging. - Tsun-Hsin Chang; Shao-Chieh Hou; Ing-Jer Huang (APCCAS, 2016)

Full system verification of compatible microprocessors with a dual physical core verification platform. - Jyun-Yan Li; Ing-Jer Huang (ISOCC, 2016)

A Reconfigurable Cache for Efficient Use of Tag RAM as Scratch-Pad Memory. - Ing-Jer Huang; Chun-Hung Lai; Yun-Chung Yang; Hsu-Kang Dow; Hung-Lun Chen (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A Bio-Sensing System-on-Chip and Software for Smart Clothes. - Hsu-Kang Dow; Ing-Jer Huang; Robert Rieger; Ko-Chi Kuo; Lan-Yuen Guo; Shih-Jung Pao (ICCE, 2019)

Creating a Scoring System with an Armband Wearable Device for Table Tennis Forehand Loop Training: Combined Use of the Principal Component Analysis and Artificial Neural Network. - Wen-Lan Wu; Jing-Min Liang; Chien-Fei Chen; Kuei-Lan Tsai; Nian-Shing Chen; Kuo-Chin Lin; Ing-Jer Huang (Sensors, 2021)

Critical Signature Assertion and On-the-Fly Recovery for Control Flow Errors in Processors. - Ing-Jer Huang; Yi-Ju Ke; Shih-Jung Pao (MCSoC, 2022)

Focusing on the Key Suspicious Trojan Nets with a Collaborative Approach. - Shih-Jung Pao; Chuan-Pin Huang; Yen-Chi Peng; Ing-Jer Huang (ISQED, 2023)