Integration of dual channel timing formatter system for high speed memory test equipment. - Jaeseok Park; Ingeol Lee; Young-Seok Park; Sung-Geun Kim; Kyungho Ryu; Dong-Hoon Jung; Kangwook Jo; Choong Keun Lee; Hongil Yoon; Seong-Ook Jung; Woo-Young Choi; Sungho Kang 001 (ISOCC, 2012)

Built-In Self-Test for Static ADC Testing with a Triangle-Wave. - Incheol Kim; Ingeol Lee; Sungho Kang 001 (IEICE Trans. Electron., 2013)

Eco Assist Techniques through Real-time Monitoring of BEV Energy Usage Efficiency. - Younsun Kim; Ingeol Lee; Sungho Kang 001 (Sensors, 2015)

A Test Methodology for Neural Computing Unit. - Minho Cheong; Ingeol Lee; Sungho Kang 001 (ISOCC, 2018)

Highly Reliable Redundant TSV Architecture for Clustered Faults. - Ingeol Lee; Minho Cheong; Sungho Kang 001 (IEEE Trans. Reliab., 2019)

A 3-D Rotation-Based Through-Silicon via Redundancy Architecture for Clustering Faults. - Minho Cheong; Ingeol Lee; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)