A Voltage and Temperature Tracking SRAM Assist Supporting 740mV Dual-Rail Offset for Low-Power and High-Performance Applications in 7nm EUV FinFET Technology. - Inhak Lee; Hanwool Jeong; Sangyeop Baeck; Siddharth Gupta 008; Changnam Park; Dongwook Seo; Jaeseung Choi 001; Jaeyoung Kim; Hoon Kim; Jungmyung Kang; Sunyung Jang; Daeyoung Moon; et al. (ISSCC, 2019)

5nm Low Power SRAM Featuring Dual-Rail Architecture with Voltage-Tracking Assist Circuit for 5G mobile application. - Sangyeop Baeck; Inhak Lee; Hoyoung Tang; Dongwook Seo; Jaeseung Choi 001; Taejoong Song; Jongwook Kye (VLSI Circuits, 2021)

4nm Voltage Auto-Tracking SRAM Pulse Generator with Fully RC Optimized Row Auto-Tracking Write Assist Circuits. - Inhak Lee; Dongwook Seo; Yunrong Li; Mijoung Kim; Sangyeop Baeck (VLSI Technology and Circuits, 2022)

A 3-nm Gate-All-Around SRAM Featuring an Adaptive Dual-Bitline and an Adaptive Cell-Power Assist Circuit. - Taejoong Song; Hoonki Kim; Woojin Rim; Hakchul Jung; Changnam Park; Inhak Lee; Sanghoon Baek; Jonghoon Jung (IEEE J. Solid State Circuits, 2022)

A 4.0GHz UHS Pseudo Two-port SRAM with BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4nm FinFET Technology. - Jeongkyun Kim; Byungho Yook; Taemin Choi; Kyuwon Choi; Chanho Lee; Yunrong Li; Youngo Lee; Seok Yun; Changhoon Do; Hoyoung Tang; Inhak Lee; Dongwook Seo; et al. (VLSI Technology and Circuits, 2023)

A 4.13-GHz UHS Pseudo Two-Port SRAM With BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4-nm FinFET Technology. - Jeongkyun Kim; Byungho Yook; Youngo Lee; Taemin Choi; Kyuwon Choi; Chanho Lee; Juchang Lee; Hyeongcheol Kim; Seok Yun; Changhoon Do; Minwoo Kwak; Mijoung Kim; et al. (IEEE J. Solid State Circuits, 2024)