Functional vector generation for assertion-based verification at behavioral level using interval analysis. - Íñigo Ugarte; Pablo Sanchez (HLDVT, 2003)

Formal meaning of coverage metrics in simulation-based hardware design verification. - Íñigo Ugarte; Pablo Sanchez (HLDVT, 2005)

Assertion Checking of Behavioral Descriptions with Non-linear Solver. - Íñigo Ugarte; Pablo Sanchez (ICCD, 2005)

Extended abstract: polynomial model-based evaluation of the branch coverage metric for functional verification of hardware systems. - Íñigo Ugarte; Pablo Sanchez (MEMOCODE, 2005)

Verification of Embedded Systems Based on Interval Analysis. - Íñigo Ugarte; Pablo Sanchez (Int. J. Parallel Program., 2005)

Assertion-based Verification of Behavioral Descriptions with Non-linear Solver. - Íñigo Ugarte; Pablo Sanchez (HLDVT, 2006)

Assertion checking of control dominated systems with nonlinear solvers. - Íñigo Ugarte; Pablo Sanchez (MEMOCODE, 2006)

Optimized coverage-directed random simulation. - Íñigo Ugarte; Pablo Sanchez (HLDVT, 2008)

Towards automated implementation of adaptive systems from abstract SystemC specifications - From SystemC adaptive processes to embedded software and to synthesizable hardware descriptions. - Fernando Herrera; Íñigo Ugarte; Eugenio Villar (Des. Autom. Embed. Syst., 2012)

Design Space Exploration in Heterogeneous Platforms Using OpenMP. - Ángel Álvarez; Íñigo Ugarte; Víctor Fernández 001; Pablo Sánchez (DCIS, 2019)

OpenMP Dynamic Device Offloading in Heterogeneous Platforms. - Ángel Álvarez; Íñigo Ugarte; Víctor Fernández 001; Pablo Sánchez (IWOMP, 2019)

Pre-Silicon FEC Decoding Verification on SoC FPGAs. - Víctor Fernández 001; Carlos Abad; Ángel Álvarez; Íñigo Ugarte; Pablo Sánchez (IEEE Commun. Lett., 2021)