6.4Gb/s multi-threaded BCH encoder and decoder for multi-channel SSD controllers. - Youngjoo Lee; Hoyoung Yoo; Injae Yoo; In-Cheol Park (ISSCC, 2012)

SNR-Adaptive Input Quantization for Turbo Decoding. - Injae Yoo; In-Cheol Park (VTC Spring, 2012)

Immediate Exchange of Extrinsic Information for High-Throughput Turbo Decoding. - Injae Yoo; Bongjin Kim; In-Cheol Park (IEEE Commun. Lett., 2012)

Memory-Optimized Hybrid Decoding Method for Multi-Rate Turbo Codes. - Injae Yoo; Bongjin Kim; In-Cheol Park (VTC Spring, 2013)

Low-Complexity Parallel QPP Interleaver Based on Permutation Patterns. - Bongjin Kim; Injae Yoo; In-Cheol Park (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

A search-less DEC BCH decoder for low-complexity fault-tolerant systems. - Injae Yoo; In-Cheol Park (SiPS, 2014)

Tail-Overlapped SISO Decoding for High-Throughput LTE-Advanced Turbo Decoders. - Injae Yoo; Bongjin Kim; In-Cheol Park (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

High-Throughput and Low-Complexity BCH Decoding Architecture for Solid-State Drives. - Youngjoo Lee; Hoyoung Yoo; Injae Yoo; In-Cheol Park (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Unidirectional ring ethernet for low-complexity in-vehicle control network. - Injae Yoo; Mina Hwang; Jaehwan Jung; Suhyun Kim; In-Cheol Park (ICIT, 2015)

Reverse Rate Matching for Low-Power LTE-Advanced Turbo Decoders. - Injae Yoo; Bongjin Kim; In-Cheol Park (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Low-Power LDPC-CC Decoding Architecture Based on the Integration of Memory Banks. - Injae Yoo; In-Cheol Park (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Fast Low-Complexity Triple-Error-Correcting BCH Decoding Architecture. - Daesung Kim; Injae Yoo; In-Cheol Park (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

An Immersive Media Recognition Method Using Depth Information of Multi-View Videos. - Injae Yoo; Jaechung Lee; Seyoung Jang; Byeongchan Park; Cheong Ghil Kim; Seok-Yoon Kim; Youngmo Kim (HCI (52), 2023)