High-radix modulo rn - 1 multipliers and adders. - Ioannis Kouretas; Vassilis Paliouras (ICECS, 2002)

High-radix redundant circuits for RNS modulo rn-1, rn, or rn+1. - Ioannis Kouretas; Vassilis Paliouras (ISCAS (5), 2003)

Low-Power Digital Filtering Based on the Logarithmic Number System. - Charalambos Basetas; Ioannis Kouretas; Vassilis Paliouras (PATMOS, 2007)

Mixed Radix-2 and High-Radix RNS Bases for Low-Power Multiplication. - Ioannis Kouretas; Vassilis Paliouras (PATMOS, 2008)

Variation-tolerant Design Using Residue Number System. - Ioannis Kouretas; Vassilis Paliouras (DSD, 2009)

High-radix residue arithmetic bases for low-power DSP systems. - Ioannis Kouretas; Vassilis Paliouras (DPS, 2009)

Residue Arithmetic for Variation-Tolerant Design of Multiply-Add Units. - Ioannis Kouretas; Vassilis Paliouras (PATMOS, 2009)

A Low-Complexity High-Radix RNS Multiplier. - Ioannis Kouretas; Vassilis Paliouras (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

RNS multi-voltage low-power multiply-add unit. - Ioannis Kouretas; Vassilis Paliouras (ICECS, 2010)

Residue arithmetic bases for reducing delay variation. - Ioannis Kouretas; Vassilis Paliouras (ISCAS, 2010)

Residue Arithmetic for Designing Low-Power Multiply-Add Units. - Ioannis Kouretas; Vassilis Paliouras (PATMOS, 2010)

Towards a Quaternion Complex Logarithmic Number System. - Mark G. Arnold; John R. Cowles; Vassilis Paliouras; Ioannis Kouretas (IEEE Symposium on Computer Arithmetic, 2011)

A Residue Logarithmic Number System ALU using interpolation and cotransformation. - Mark G. Arnold; Ioannis Kouretas; Vassilis Paliouras (ASAP, 2011)

Residue arithmetic for designing multiply-add units in the presence of non-gaussian variation. - Ioannis Kouretas; Vassilis Paliouras (ISCAS, 2012)

Delay-variation-tolerant FIR filter architectures based on the Residue Number System. - Ioannis Kouretas; Vassilis Paliouras (ISCAS, 2013)

Low-Power Logarithmic Number System Addition/Subtraction and Their Impact on Digital Filters. - Ioannis Kouretas; Charalambos Basetas; Vassilis Paliouras (IEEE Trans. Computers, 2013)

Dynamic delay variation behaviour of RNS multiply-add architectures. - Kleanthis Papachatzopoulos; Ioannis Kouretas; Vassilis Paliouras (ISCAS, 2016)

Simplified Deep-Learning-based decoders for linear block codes. - Emmanouil Kavvousanos; Vassilis Paliouras; Ioannis Kouretas (ICECS, 2018)

Hardware aspects of Long Short Term Memory. - Ioannis Kouretas; Vassilis Paliouras (ICECS, 2018)

Logarithmic number system for deep learning. - Ioannis Kouretas; Vassilis Paliouras (MOCAST, 2018)

Effective Capacity of Fluctuating Two-Ray Channels with Arbitrary Fading Parameters. - Kostas P. Peppas; Ioannis Kouretas; Jiayi Zhang 001; Spyridon K. Chronopoulos (SPAWC, 2018)

Under- and Overflow Detection in the Residue Logarithmic Number System. - Mark G. Arnold; Ioannis Kouretas; Vassilis Paliouras; John R. Cowles (ARITH, 2019)

Simplified Hardware Implementation of the Softmax Activation Function. - Ioannis Kouretas; Vassilis Paliouras (MOCAST, 2019)

One-Hot Residue Logarithmic Number Systems. - Mark G. Arnold; Ioannis Kouretas; Vassilis Paliouras; Austin Morgan (PATMOS, 2019)

Radix-3 low-complexity modulo-M multipliers. - Ioannis Kouretas; Vassilis Paliouras (PATMOS, 2019)

Implementing the Residue Logarithmic Number System Using Interpolation and Cotransformation. - Mark G. Arnold; Vassilis Paliouras; Ioannis Kouretas (IEEE Trans. Computers, 2020)

On Reducing the Number of Multiplications in RNS-based CNN Accelerators. - Vasilis Sakellariou; Vassilis Paliouras; Ioannis Kouretas; Hani H. Saleh; Thanos Stouraitis (ICECS, 2021)

Simplified Hardware Implementation of Memoryless Dot Product for Neural Network Inference. - Ioannis Kouretas; Vassilis Paliouras (ISCAS, 2021)

Hardware Aspects of Parallel Neural Network Implementation. - Ioannis Kouretas; Vassilis Paliouras (MOCAST, 2021)

A High-performance RNS LSTM block. - Vasilis Sakellariou; Vassilis Paliouras; Ioannis Kouretas; Hani H. Saleh; Thanos Stouraitis (ISCAS, 2022)

Fetus Heart Rate Monitoring: A Preliminary Research Study With Remote Sensing. - Anastasios G. Skrivanos; Evangelia I. Kosma; Spyridon K. Chronopoulos; Ioannis Kouretas; Dimitrios Dimopoulos; Georgios Petrakos; Elena Alhazidou; Vasilis Christofilakis; Nafsika Ziavra; Kostas P. Peppas; Eugenia I. Toki (IEEE Consumer Electron. Mag., 2022)

Modified Logarithmic Multiplication Approximation for Machine Learning. - Ioannis Kouretas; Vassilis Paliouras; Thanos Stouraitis (AICAS, 2023)

Improving Residue-Level Sparsity in RNS-based Neural Network Hardware Accelerators via Regularization. - Emmanouil Kavvousanos; Vasilis Sakellariou; Ioannis Kouretas; Vassilis Paliouras; Thanos Stouraitis (ARITH, 2023)

A Regularization Approach to Maximize Common Sub-Expressions in Neural Network Weights. - Emmanouil Kavvousanos; Ioannis Kouretas; Vassilis Paliouras; Thanos Stouraitis (ICECS, 2023)

On the modulo 2n+1 addition and subtraction for weighted operands. - Constantinos Efstathiou; Ioannis Kouretas; Paris Kitsos (Microprocess. Microsystems, 2023)

An end-to-end RNS CNN Accelerator. - Vasilis Sakellariou; Vassilis Paliouras; Ioannis Kouretas; Hani H. Saleh; Thanos Stouraitis (AICAS, 2024)

A Multiplier-Free RNS-Based CNN Accelerator Exploiting Bit-Level Sparsity. - Vasilis Sakellariou; Vassilis Paliouras; Ioannis Kouretas; Hani H. Saleh; Thanos Stouraitis (IEEE Trans. Emerg. Top. Comput., 2024)

A Mixed-Precision RNS DNN Accelerator. - Vasilis Sakellariou; Vassilis Paliouras; Ioannis Kouretas; Hani H. Saleh; Thanos Stouraitis (ISCAS, 2025)

Efficient Majority Logic Modulo 2n-1 Adder Design. - Constantinos Efstathiou; Ioannis Kouretas; Paris Kitsos (ISVLSI, 2025)