A generalized signal reconstruction method for designing interpolation filters. - Ioannis L. Syllaios; Poras T. Balsara; Oren E. Eliezer (ISCAS, 2006)

Time-Domain Modeling of a Phase-Domain All-Digital Phase-Locked Loop for RF Applications. - Ioannis L. Syllaios; Poras T. Balsara; Robert Bogdan Staszewski (CICC, 2007)

On the Reconfigurability of All-Digital Phase-Locked Loops for Software Defined Radios. - Ioannis L. Syllaios; Poras T. Balsara; Robert Bogdan Staszewski (PIMRC, 2007)

Time-Domain Modeling of an RF All-Digital PLL. - Ioannis L. Syllaios; Robert Bogdan Staszewski; Poras T. Balsara (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Recombination of Envelope and Phase Paths in Wideband Polar Transmitters. - Ioannis L. Syllaios; Poras T. Balsara; Robert Bogdan Staszewski (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Multi-clock domain analysis and modeling of all-digital frequency synthesizers. - Ioannis L. Syllaios; Poras T. Balsara (ISCAS, 2011)

Linear Time-Variant Modeling and Analysis of All-Digital Phase-Locked Loops. - Ioannis L. Syllaios; Poras T. Balsara (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

DPLL with hybrid ΔΣ phase/frequency detector. - Ioannis L. Syllaios; Henrik T. Jensen 001 (ISCAS, 2015)

Hybrid-DPLL-based constant-envelope modulator for Internet-of-Things chipsets. - Ioannis L. Syllaios (ISCAS, 2017)

Hybrid ΔΣ Programmable Phase/Frequency Detector for IoT Chipsets. - Ioannis L. Syllaios (ISCAS, 2018)