Compressing ATM Streams On-Line. - Ioannis Papaefstathiou (Data Compression Conference, 1999)

An IRAM-based architecture for a single-chip ATM switch. - Ioannis Papaefstathiou; A. Brown; J. Simer; D. Sobel; J. Sutaria; S. Y. Wang; T. Blackwell; M. Smith; W. Yang (ICECS, 1999)

Accelerating ATM: on-line compression of ATM streams. - Ioannis Papaefstathiou (IPCCC, 1999)

Measurement Based Connection Admission Control Algorithm for ATM Networks that Use Low Level Compression. - Ioannis Papaefstathiou (IS&N, 2000)

An ultra high-speed compressor for packet networks. - Ioannis Papaefstathiou (ICECS, 2001)

Increasing packet network bandwidth through low level compression - Ioannis Papaefstathiou (2001)

Read, use, simulate, experiment and build: an integrated approach for teaching computer architecture. - Ioannis Papaefstathiou; Christos P. Sotiriou (WCAE, 2002)

GFS: An Efficient Implementation of Fair Scheduling for Mult-Gigabit Packet Networks. - George Kornaros; Theofanis Orphanoudakis; Ioannis Papaefstathiou (ASAP, 2003)

A fully-programmable memory management system optimizing queue handling at multi-gigabit rates. - George Kornaros; Ioannis Papaefstathiou; Aristides Nikologiannis; Nicholaos Zervos (DAC, 2003)

An Innovative Resource Management Scheme for Multi-gigabit Networking Systems. - George Kornaros; Ioannis Papaefstathiou (HSNMC, 2003)

Performance against cost trade-offs for hardware compression in 10 Gigabit networks. - Ioannis Papaefstathiou; George Kornaros (ICECS, 2003)

Design-space exploration of a cryptography algorithm. - Christos P. Sotiriou; Ioannis Papaefstathiou (ICECS, 2003)

Active flow identifiers for scalable, QoS scheduling in 10-Gbps network processors. - George Kornaros; Theofanis Orphanoudakis; Ioannis Papaefstathiou (ISCAS (2), 2003)

An innovative scheduling scheme for high-speed network processors. - Ioannis Papaefstathiou; Helen-Catherine Leligou; Theofanis Orphanoudakis; George Kornaros; Nicholaos Zervos; George E. Konstantoulakis (ISCAS (2), 2003)

Titan II : An IPComp Processor for 10Gbit/sec networks. - Ioannis Papaefstathiou (ISVLSI, 2003)

Software Processing Performance in Network Processors. - Ioannis Papaefstathiou; George Kornaros; Nicholaos Zervos (DATE, 2004)

Variable packet size buffered crossbar (CICQ) switches. - Manolis Katevenis; Giorgos Passas; Dimitrios Simos; Ioannis Papaefstathiou; Nikolaos Chrysos (ICC, 2004)

Titan II: An IPcomp Processor for 10-Gbps Networks. - Ioannis Papaefstathiou (IEEE Des. Test Comput., 2004)

Packet Processing acceleration with a 3-stage programmable pipeline engine. - Ioannis Papaefstathiou; Kyriakos Vlachos; Nikos A. Nikolaou; Nicholas Zervos; Victor B. Lawrence (IEEE Commun. Lett., 2004)

Low Level Hardware Compression for Multi-gigabit Networks. - Ioannis Papaefstathiou (J. Circuits Syst. Comput., 2004)

An FPGA-based queue management system for high speed networking devices. - Aristides Nikologiannis; Ioannis Papaefstathiou; George Kornaros; Christopher Kachris (Microprocess. Microsystems, 2004)

Design-space exploration of the most widely used cryptography algorithms. - Ioannis Papaefstathiou; Vassilis Papaefstathiou; Christos P. Sotiriou (Microprocess. Microsystems, 2004)

Guest Editors' Introduction: Network Processors for Future High-End Systems and Applications. - Ioannis Papaefstathiou; Nikos A. Nikolaou; Bharat T. Doshi; Eric Grosse (IEEE Micro, 2004)

PRO3: A Hybrid NPU Architecture. - Ioannis Papaefstathiou; Stylianos Perissakis; Theofanis Orphanoudakis; Nikos A. Nikolaou; George Kornaros; Nicholas Zervos; George E. Konstantoulakis; Dionisios N. Pnevmatikatos; Kyriakos Vlachos (IEEE Micro, 2004)

A Low-Power Processor Architecture Optimized forWireless Devices. - Aristides Efthymiou; Jim D. Garside; Ioannis Papaefstathiou (ASAP, 2005)

Queue Management in Network Processors. - Ioannis Papaefstathiou; Theofanis Orphanoudakis; George Kornaros; Christopher Kachris; Ioannis Mavroidis; Aristides Nikologiannis (DATE, 2005)

A Memory Efficient, 100 Gb/sec MAC Classification Engine. - Vassilis Papaefstathiou; Ioannis Papaefstathiou (LCN, 2005)

A hardware-engine for layer-2 classification in low-storage, ultra-high bandwidth environments. - Vassilis Papaefstathiou; Ioannis Papaefstathiou (DATE Designers' Forum, 2006)

An innovative low-cost Classification Scheme for combined multi-Gigabit IP and Ethernet Networks. - Ioannis Papaefstathiou; Vassilis Papaefstathiou (ICC, 2006)

Efficient testbench code synthesis for a hardware emulator system. - Ioannis Mavroidis; Ioannis Papaefstathiou (DATE, 2007)

A Fast FPGA-Based 2-Opt Solver for Small-Scale Euclidean Traveling Salesman Problem. - Ioannis Mavroidis; Ioannis Papaefstathiou; Dionisios N. Pnevmatikatos (FCCM, 2007)

An efficient FPGA-based implementation of Pollard's (ρ - 1) factorization algorithm. - Dimitrios Meintanis; Ioannis Papaefstathiou (FPT, 2007)

A buffered crossbar-based chip interconnection framework supporting quality of service. - Ioannis Papaefstathiou; George Kornaros; Nikolaos Chrysos (ACM Great Lakes Symposium on VLSI, 2007)

Memory-Efficient 5D Packet Classification At 40 Gbps. - Ioannis Papaefstathiou; Vassilis Papaefstathiou (INFOCOM, 2007)

An Embedded Networking SoC for purely Ethernet MANs/WANs. - Theofanis Orphanoudakis; George Kornaros; Ioannis Mavroidis; Aristides Nikologiannis; Ioannis Papaefstathiou (ISCC, 2007)

Hardware Implementation of 2-Opt Local Search Algorithm for the Traveling Salesman Problem. - Ioannis Mavroidis; Ioannis Papaefstathiou; Dionisios N. Pnevmatikatos (IEEE International Workshop on Rapid System Prototyping, 2007)

A Memory-Efficient Reconfigurable Aho-Corasick FSM Implementation for Intrusion Detection Systems. - Vassilis Dimopoulos; Ioannis Papaefstathiou; Dionisios N. Pnevmatikatos (ICSAMOS, 2007)

Design and performance evaluation of a Programmable Packet Processing Engine (PPE) suitable for high-speed network processors units. - Kyriakos Vlachos; Theofanis Orphanoudakis; Ioannis Papaefstathiou; Nikos A. Nikolaou; Dionisios N. Pnevmatikatos; George E. Konstantoulakis; Jorge-A. Sanchez-Papaspiliou (Microprocess. Microsystems, 2007)

MPLEM: An 80-processor FPGA Based Multiprocessor System. - Georgios-Grigorios Mplemenos; Ioannis Papaefstathiou (FCCM, 2008)

A Memory-Efficient FPGA-based Classification Engine. - Antonis Nikitakis; Ioannis Papaefstathiou (FCCM, 2008)

Titan-R: A Reconfigurable Hardware Implementation of a High-Speed Compressor. - Konstantinos Papadopoulos 003; Ioannis Papaefstathiou (FCCM, 2008)

Accelerating hardware simulation: Testbench code emulation. - Iakovos Mavroidis; Ioannis Papaefstathiou (FPT, 2008)

A Multi Gigabit FPGA-Based 5-tuple Classification System. - Antonis Nikitakis; Ioannis Papaefstathiou (ICC, 2008)

Power Consumption Estimations vs Measurements for FPGA-Based Security Cores. - Dimitrios Meintanis; Ioannis Papaefstathiou (ReConFig, 2008)

Building an FoC Using Large, Buffered Crossbar Cores. - Dimitrios Simos; Ioannis Papaefstathiou; Manolis Katevenis (IEEE Des. Test Comput., 2008)

Heavily Reducing WSNs' Energy Consumption by Employing Hardware-Based Compression. - Grigorios Chrysos 001; Ioannis Papaefstathiou (ADHOC-NOW, 2009)

On the Power Consumption of Security Algorithms Employed in Wireless Networks. - Dimitrios Meintanis; Ioannis Papaefstathiou (CCNC, 2009)

Design and implementation of a database filter for BLAST acceleration. - Panagiotis Afratis; Constantinos Galanakis; Euripides Sotiriades; Georgios-Grigorios Mplemenos; Grigorios Chrysos 001; Ioannis Papaefstathiou; Dionisios N. Pnevmatikatos (DATE, 2009)

High-End Reconfigurable Systems for Fast Windows' Password Cracking. - Kostas Theocharoulis; Charalampos Manifavas; Ioannis Papaefstathiou (FCCM, 2009)

Securing wireless sensor networks towards a trusted "Internet of Things". - Theodore B. Zahariadis; Panagiotis Trakadas; Helen-Catherine Leligou; Kostas Papadopoylos; Evangelos Ladis; Christos Tselikis; Charalampos Vangelatos; Lionel Besson; Jukka Manner; Michael I. Loupis; Federico Alvarez; Ioannis Papaefstathiou (Future Internet Assembly, 2009)

Implementation of a genetic algorithm on a virtex-ii pro FPGA. - Michalis Vavouras; Kyprianos Papadimitriou; Ioannis Papaefstathiou (FPGA, 2009)

A FPGA based coprocessor for gene finding using Interpolated Markov Model (IMM). - Grigorios Chrysos 001; Euripides Sotiriades; Ioannis Papaefstathiou; Apostolos Dollas (FPL, 2009)

A self-reconfiguring architecture supporting multiple objective functions in genetic algorithms. - Charalampos Effraimidis; Kyprianos Papadimitriou; Apostolos Dollas; Ioannis Papaefstathiou (FPL, 2009)

Design space exploration of reconfigurable systems for calculating flying object's optimal noise reduction paths. - Dimitrios Kontos; Ioannis Papaefstathiou; Dionisios N. Pnevmatikatos (FPL, 2009)

A fast parallel matrix multiplication reconfigurable unit utilized in face recognitions systems. - Joannis Sotiropoulos; Ioannis Papaefstathiou (FPL, 2009)

Design and Implementation of an UWB Digital Transmitter Based on the Multiband OFDM Physical Layer Proposal. - Michalis Platsis; Ioannis Papaefstathiou; Dimitrios Meintanis (IEEE International Workshop on Rapid System Prototyping, 2009)

High-speed FPGA-based implementations of a Genetic Algorithm. - Michalis Vavouras; Kyprianos Papadimitriou; Ioannis Papaefstathiou (ICSAMOS, 2009)

Accelerating Emulation and Providing Full Chip Observability and Controllability. - Iakovos Mavroidis; Ioannis Mavroidis; Ioannis Papaefstathiou (IEEE Des. Test Comput., 2009)

Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes. - Matthias Hanke; Tim Kranich; Mladen Berekovic; Yannis Papaefstathiou (Dynamically Reconfigurable Architectures, 2010)

Fast and Efficient FPGA-Based Feature Detection Employing the SURF Algorithm. - Dimitris Bouris; Antonis Nikitakis; Ioannis Papaefstathiou (FCCM, 2010)

Implementing Rainbow Tables in High-End FPGAs for Super-Fast Password Cracking. - Kostas Theocharoulis; Ioannis Papaefstathiou; Charalampos Manifavas (FPL, 2010)

Using Reconfigurable Hardware Devices in WSNs for Reducing the Energy Consumption of Routing and Security Tasks. - Georgios-Grigorios Mplemenos; Konstantinos Papadopoulos 003; Ioannis Papaefstathiou (GLOBECOM, 2010)

Development and implementation of a Network Processor Architecture in reconfigurable logic (FPGA). - Constantinos Stefanatos; Ioannis Papaefstathiou; Charalampos Manifavas (WISES, 2010)

An Open-Source Scaled Automobile Platform for Fault-Tolerant Electronic Stability Control. - Diomidis I. Katzourakis; Ioannis Papaefstathiou; Michail G. Lagoudakis (IEEE Trans. Instrum. Meas., 2010)

Titan-R: A Multigigabit Reconfigurable Combined Compression/Decompression Unit. - Konstantinos Papadopoulos 003; Ioannis Papaefstathiou (ACM Trans. Reconfigurable Technol. Syst., 2010)

Reconfigurable Computing IP Cores for Multiple Sequence Alignment. - Matina Lakka; A. Desarti; Grigorios Chrysos 001; Euripides Sotiriades; Ioannis Papaefstathiou; Apostolos Dollas (BIOINFORMATICS, 2011)

Parallel accelerators for GlimmerHMM bioinformatics algorithm. - Nafsika Chrysanthou; Grigorios Chrysos 001; Euripides Sotiriades; Ioannis Papaefstathiou (DATE, 2011)

Architecture, Design, and Experimental Evaluation of a Lightfield Descriptor Depth Buffer Algorithm on Reconfigurable Logic and on a GPU. - Matina Lakka; Grigorios Chrysos 001; Ioannis Papaefstathiou; Apostolos Dollas (FCCM, 2011)

Novel and Highly Efficient Reconfigurable Implementation of Data Mining Classification Tree. - Grigorios Chrysos 001; Panagiotis Dagritzikos; Ioannis Papaefstathiou; Apostolos Dollas (FPL, 2011)

FPGA power consumption measurements and estimations under different implementation parameters. - Dimitrios Meidanis; Konstantinos Georgopoulos; Ioannis Papaefstathiou (FPT, 2011)

RESENSE: An Innovative, Reconfigurable, Powerful and Energy Efficient WSN Node. - Andreas Brokalakis; Georgios-Grigorios Mplemenos; Konstantinos Papadopoulos 003; Ioannis Papaefstathiou (ICC, 2011)

An FPGA-based parallel processor for Black-Scholes option pricing using finite differences schemes. - Georgios Chatziparaskevas; Andreas Brokalakis; Ioannis Papaefstathiou (DATE, 2012)

FASTCUDA: Open Source FPGA Accelerator & Hardware-Software Codesign Toolset for CUDA Kernels. - Iakovos Mavroidis; Ioannis Mavroidis; Ioannis Papaefstathiou; Luciano Lavagno; Mihai T. Lazarescu; Eduardo de la Torre; Florian Schäfer 001 (DSD, 2012)

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration. - Dionisios N. Pnevmatikatos; Tobias Becker; Andreas Brokalakis; Karel Bruneel; Georgi Gaydadjiev; Wayne Luk; Kyprianos Papadimitriou; Ioannis Papaefstathiou; Oliver Pell; Christian Pilato; M. Robart; Marco D. Santambrogio; et al. (DSD, 2012)

A novel low-power embedded object recognition system working at multi-frames per second (Extended abstract). - Antonis Nikitakis; Savvas Papaioannou; Ioannis Papaefstathiou (ESTIMedia, 2012)

Breaking the GSM A5/1 cryptography algorithm with rainbow tables and high-end FPGAS. - Maria Kalenderi; Dionisios N. Pnevmatikatos; Ioannis Papaefstathiou; Charalampos Manifavas (FPL, 2012)

ROTA: An Archipelago-Wide Area Network for High Speed Communication to Ships. - Ioannis Papaefstathiou; Euripides Sotiriades; Stratos Apostolakis; Apostolos Dollas; Pantelis N. Karamolegkos; Marios Logaras; Ioannis Chatzigiannakis; Leonidas Vasilikiotis; Maria Emmanouilidou; Stavros Aggelidakis; Petros Hatzidakis (Panhellenic Conference on Informatics, 2012)

Using hardware-based forward error correction to reduce the overall energy consumption of WSNs. - Andreas Brokalakis; Ioannis Papaefstathiou (WCNC, 2012)

Fast and power-efficient hardware implementation of a routing scheme for WSNs. - Georgios-Grigorios Mplemenos; Ioannis Papaefstathiou (WCNC, 2012)

A novel highly flexible network multi-processor optimised for reconfigurable devices. - Grigoris Raptis; Ioannis Papaefstathiou; Konstantinos Georgopoulos; Charalampos Manifavas (AFRICON, 2013)

Highly parallel implementation of Sphinx-3 voice recognition algorithm. - Dimitris Tsiamasiotis; Ioannis Papaefstathiou; Charalampos Manifavas (AFRICON, 2013)

Parallelizing bioinformatics and security applications on a low-cost multi-core system. - Teodor Tzanoudakis; Ioannis Papaefstathiou; Charalampos Manifavas (AICCSA, 2013)

Fast, FPGA-based Rainbow Table creation for attacking encrypted mobile communications. - Panagiotis Papantonakis; Dionisios N. Pnevmatikatos; Ioannis Papaefstathiou; Charalampos Manifavas (FPL, 2013)

A lightweight anonymity & location privacy service. - Konstantinos Fysarakis; Charalampos Manifavas; Ioannis Papaefstathiou; Anastasios Adamopoulos (ISSPIT, 2013)

IPv6 security for low power and lossy networks. - Konstantinos Rantos; Alexandros Papanikolaou; Charalampos Manifavas; Ioannis Papaefstathiou (Wireless Days, 2013)

HEAP: A Highly Efficient Adaptive multi-Processor framework. - Luciano Lavagno; Mihai T. Lazarescu; Ioannis Papaefstathiou; Andreas Brokalakis; Johan Walters; Bart Kienhuis; Florian Schäfer 001 (Microprocess. Microsystems, 2013)

HC-CART: A parallel system implementation of data mining classification and regression tree (CART) algorithm on a multi-FPGA system. - Grigorios Chrysos 001; Panagiotis Dagritzikos; Ioannis Papaefstathiou; Apostolos Dollas (ACM Trans. Archit. Code Optim., 2013)

Significantly reducing MPI intercommunication latency and power overhead in both embedded and HPC systems. - Pavlos M. Mattheakis; Ioannis Papaefstathiou (ACM Trans. Archit. Code Optim., 2013)

A novel low-power embedded object recognition system working at multi-frames per second. - Antonis Nikitakis; Savvas Papaioannou; Ioannis Papaefstathiou (ACM Trans. Embed. Comput. Syst., 2013)

Evaluating routing metric composition approaches for QoS differentiation in low power and lossy networks. - Panagiotis Karkazis; Panagiotis Trakadas; Helen-Catherine Leligou; Lambros Sarakis; Ioannis Papaefstathiou; Theodore B. Zahariadis (Wirel. Networks, 2013)

ModConTR: A modular and configurable trust and reputation-based system for secure routing in ad-hoc networks. - George Hatzivasilis; Ioannis Papaefstathiou; Charalampos Manifavas (AICCSA, 2014)

Effective Reconfigurable Design: The FASTER Approach. - Dionisios N. Pnevmatikatos; Tobias Becker; Andreas Brokalakis; Georgi Nedeltchev Gaydadjiev; Wayne Luk; Kyprianos Papadimitriou; Ioannis Papaefstathiou; Danilo Pau; Oliver Pell; Christian Pilato; Marco D. Santambrogio; Donatella Sciuto; et al. (ARC, 2014)

A novel embedded system for vision tracking. - Antonis Nikitakis; Theofilos Paganos; Ioannis Papaefstathiou (DATE, 2014)

Policy-based access control for DPWS-enabled ubiquitous devices. - Konstantinos Fysarakis; Ioannis Papaefstathiou; Charalampos Manifavas; Konstantinos Rantos; Othonas Sultatos (ETFA, 2014)

HPC-gSpan: An FPGA-based parallel system for frequent subgraph mining. - Athanasios Stratikopoulos; Grigorios Chrysos 001; Ioannis Papaefstathiou; Apostolos Dollas (FPL, 2014)

Evaluation of RPL with a transmission count-efficient and trust-aware routing metric. - Panagiotis Karkazis; Ioannis Papaefstathiou; Lambros Sarakis; Theodore B. Zahariadis; Terpsichori-Helen N. Velivasaki; Dimitrios Bargiotas (ICC, 2014)

A Reasoning System for Composition Verification and Security Validation. - George Hatzivasilis; Ioannis Papaefstathiou; Charalampos Manifavas; Nikos Papadakis (NTMS, 2014)

Policy-Based Access Control for Body Sensor Networks. - Charalampos Manifavas; Konstantinos Fysarakis; Konstantinos Rantos; Konstantinos Kagiambakis; Ioannis Papaefstathiou (WISTP, 2014)

Reconfiguring the Bioinformatics Computational Spectrum: Challenges and Opportunities of FPGA-Based Bioinformatics Acceleration Platforms. - Grigorios Chrysos 001; Euripides Sotiriades; Christos Rousopoulos; K. Pramataris; Ioannis Papaefstathiou; Apostolos Dollas; Agathoklis Papadopoulos; Ioannis Kirmitzoglou; Vasilis J. Promponas; Theo Theocharides; George Petihakis 001; Jacques Lagnel (IEEE Des. Test, 2014)

Acceleration of Data Streaming Classification using Reconfigurable Technology. - Pavlos Giakoumakis; Grigorios Chrysos 001; Apostolos Dollas; Ioannis Papaefstathiou (ARC, 2015)

COSSIM: A Novel, Comprehensible, Ultra-Fast, Security-Aware CPS Simulator. - Ioannis Papaefstathiou; Gregory Chrysos; Lambros Sarakis (ARC, 2015)

WSACd - A Usable Access Control Framework for Smart Home Devices. - Konstantinos Fysarakis; Charalampos Konstantourakis; Konstantinos Rantos; Charalampos Manifavas; Ioannis Papaefstathiou (WISTP, 2015)

Lightweight Password Hashing Scheme for Embedded Systems. - George Hatzivasilis; Ioannis Papaefstathiou; Charalampos Manifavas; Ioannis G. Askoxylakis (WISTP, 2015)

Node.DPWS: High performance and scalable Web Services for the IoT. - Konstantinos Fysarakis; Damianos Mylonakis; Charalampos Manifavas; Ioannis Papaefstathiou (CoRR, 2015)

Password Hashing Competition - Survey and Benchmark. - George Hatzivasilis; Ioannis Papaefstathiou; Charalampos Manifavas (IACR Cryptol. ePrint Arch., 2015)

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration. - Dionisios N. Pnevmatikatos; Kyprianos Papadimitriou; Tobias Becker; Peter Böhm; Andreas Brokalakis; Karel Bruneel; Catalin Bogdan Ciobanu; Tom Davidson; Georgi Gaydadjiev; Karel Heyse; Wayne Luk; Xinyu Niu; et al. (Microprocess. Microsystems, 2015)

Embedded Systems Security: A Survey of EU Research Efforts. - Charalampos Manifavas; Konstantinos Fysarakis; Alexandros Papanikolaou; Ioannis Papaefstathiou (Secur. Commun. Networks, 2015)

ECOSCALE: Reconfigurable computing and runtime system for future exascale systems. - Iakovos Mavroidis; Ioannis Papaefstathiou; Luciano Lavagno; Dimitrios S. Nikolopoulos; Dirk Koch; John Goodacre; Ioannis Sourdis; Vassilis Papaefstathiou; Marcello Coppola; Manuel Palomino (DATE, 2016)

Highly efficient reconfigurable parallel graph cuts for embedded vision. - Antonis Nikitakis; Ioannis Papaefstathiou (DATE, 2016)

A novel background subtraction scheme for in-camera acceleration in thermal imagery. - Antonis Nikitakis; Ioannis Papaefstathiou; Konstantinos Makantasis; Anastasios D. Doulamis (DATE, 2016)

IoT design course using open-source tools. - Ioannis Papaefstathiou (EDUCON, 2016)

Which IoT Protocol? Comparing Standardized Approaches over a Common M2M Application. - Konstantinos Fysarakis; Ioannis G. Askoxylakis; Othonas Soultatos; Ioannis Papaefstathiou; Charalampos Manifavas; Vasilios Katos (GLOBECOM, 2016)

Evaluation of External Memory Access Performance on a High-End FPGA Hybrid Computer. - Konstantinos Kalaitzis; Evripidis Sotiriadis; Ioannis Papaefstathiou; Apostolos Dollas (Comput., 2016)

Variational Inference Background Subtraction Algorithm for in-Camera Acceleration in Thermal Imagery. - Konstantinos Makantasis; Antonis Nikitakis; Anastasios D. Doulamis; Nikolaos Doulamis; Yannis Papaefstathiou (CoRR, 2016)

Lightweight authenticated encryption for embedded on-chip systems. - George Hatzivasilis; George Floros 005; Ioannis Papaefstathiou; Charalampos Manifavas (Inf. Secur. J. A Glob. Perspect., 2016)

RtVMF: A Secure Real-Time Vehicle Management Framework. - Konstantinos Fysarakis; George Hatzivasilis; Charalampos Manifavas; Ioannis Papaefstathiou (IEEE Pervasive Comput., 2016)

A survey of lightweight stream ciphers for embedded systems. - Charalampos Manifavas; George Hatzivasilis; Konstantinos Fysarakis; Yannis Papaefstathiou (Secur. Commun. Networks, 2016)

Node.DPWS: Efficient Web Services for the Internet of Things. - Konstantinos Fysarakis; Damianos Mylonakis; Charalampos Manifavas; Ioannis Papaefstathiou (IEEE Softw., 2016)

Software Security, Privacy, and Dependability: Metrics and Measurement. - George Hatzivasilis; Ioannis Papaefstathiou; Charalampos Manifavas (IEEE Softw., 2016)

Accelerating Intercommunication in Highly Parallel Systems. - Nikolaos Tampouratzis; Pavlos M. Mattheakis; Ioannis Papaefstathiou (ACM Trans. Archit. Code Optim., 2016)

A novel way to efficiently simulate complex full systems incorporating hardware accelerators. - Nikolaos Tampouratzis; Konstantinos Georgopoulos; Yannis Papaefstathiou (DATE, 2017)

An Open-Source Extendable, Highly-Accurate and Security Aware CPS Simulator. - Andreas Brokalakis; Nikolaos Tampouratzis; Antonis Nikitakis; Stamatis Andrianakis; Ioannis Papaefstathiou; Apostolos Dollas (DCOSS, 2017)

An Architecture for the Acceleration of a Hybrid Leaky Integrate and Fire SNN on the Convey HC-2ex FPGA-Based Processor. - Emmanouil Kousanakis; Apostolos Dollas; Euripides Sotiriades; Ioannis Papaefstathiou; Dionisios N. Pnevmatikatos; Athanasia Papoutsi; Panagiotis C. Petrantonakis; Panayiota Poirazi; Spyridon Chavlis; George Kastellakis (FCCM, 2017)

SecRoute: End-to-end secure communications for wireless ad-hoc networks. - George Hatzivasilis; Ioannis Papaefstathiou; Konstantinos Fysarakis; Ioannis G. Askoxylakis (ISCC, 2017)

Lightweight & secure industrial IoT communications via the MQ telemetry transport protocol. - Sotirios Katsikeas; Konstantinos Fysarakis; Andreas I. Miaoudakis; Amaury Van Bemten; Ioannis G. Askoxylakis; Ioannis Papaefstathiou; Anargyros Plemenos (ISCC, 2017)

Real-time management of railway CPS secure administration of IoT and CPS infrastructure. - George Hatzivasilis; Ioannis Papaefstathiou; Charalampos Manifavas (MECO, 2017)

SCOTRES: Secure Routing for IoT and CPS. - George Hatzivasilis; Ioannis Papaefstathiou; Charalampos Manifavas (IEEE Internet Things J., 2017)

Comparing C and SystemC Based HLS Methods for Reconfigurable Systems Design. - Konstantinos Georgopoulos; Pavlos Malakonakis; Nikolaos Tampouratzis; Antonis Nikitakis; Grigorios Chrysos 001; Apostolos Dollas; Dionysios N. Pnevmatikatos; Ioannis Papaefstathiou (ARC, 2018)

HLS Algorithmic Explorations for HPC Execution on Reconfigurable Hardware - ECOSCALE. - Pavlos Malakonakis; Konstantinos Georgopoulos; Aggelos Ioannou; Luciano Lavagno; Ioannis Papaefstathiou; Iakovos Mavroidis (ARC, 2018)

COSSIM: An Open-Source Integrated Solution to Address the Simulator Gap for Systems of Systems. - Andreas Brokalakis; Nikolaos Tampouratzis; Antonios Nikitakis; Ioannis Papaefstathiou; Stamatis Andrianakis; Danilo Pau; Emanuele Plebani; Marco Paracchini; Marco Marcon; Ioannis Sourdis; Prajith Ramakrishnan Geethakumari; Maria Carmen Palacios; et al. (DSD, 2018)

SeMIBIoT: Secure Multi-Protocol Integration Bridge for the IoT. - Emmanouil Palavras; Konstantinos Fysarakis; Ioannis Papaefstathiou; Ioannis G. Askoxylakis (ICC, 2018)

An open-source extendable, highly-accurate and security aware simulator for cloud applications. - Andreas Brokalakis; Nikolaos Tampouratzis; Antonios Nikitakis; Ioannis Papaefstathiou; Stamatis Andrianakis; Apostolos Dollas; Marco Paracchini; Marco Marcon; Danilo Pietro Pau; Emanuele Plebani (ICIN, 2018)

Extending the Forward Error Correction Paradigm for Multi-Hop Wireless Sensor Networks. - Andreas Brokalakis; Ioannis Chondroulis; Ioannis Papaefstathiou (NTMS, 2018)

AmbISPDM - Managing embedded systems in ambient environments and disaster mitigation planning. - George Hatzivasilis; Ioannis Papaefstathiou; Dimitris Plexousakis; Charalampos Manifavas; Nikos Papadakis (Appl. Intell., 2018)

The Industrial Internet of Things as an enabler for a Circular Economy Hy-LP: A novel IIoT protocol, evaluated on a wind park's SDN/NFV-enabled 5G industrial network. - George Hatzivasilis; Konstantinos Fysarakis; Othonas Soultatos; Ioannis G. Askoxylakis; Ioannis Papaefstathiou; Giorgos Demetriou (Comput. Commun., 2018)

XSACd - Cross-domain resource sharing & access control for smart environments. - Konstantinos Fysarakis; Othonas Soultatos; Charalampos Manifavas; Ioannis Papaefstathiou; Ioannis G. Askoxylakis (Future Gener. Comput. Syst., 2018)

A review of lightweight block ciphers. - George Hatzivasilis; Konstantinos Fysarakis; Ioannis Papaefstathiou; Charalampos Manifavas (J. Cryptogr. Eng., 2018)

Data-Driven Background Subtraction Algorithm for In-Camera Acceleration in Thermal Imagery. - Konstantinos Makantasis; Antonios Nikitakis; Anastasios D. Doulamis; Nikolaos D. Doulamis; Ioannis Papaefstathiou (IEEE Trans. Circuits Syst. Video Technol., 2018)

A Novel, Simulator for Heterogeneous Cloud Systems that Incorporate Custom Hardware Accelerators. - Nikolaos Tampouratzis; Ioannis Papaefstathiou (IEEE Trans. Multi Scale Comput. Syst., 2018)

An Open-Source High-Throughput, Reduced Memory Footprint, Face Detection, Pose Estimation and Landmark Localization System. - Panos Kalodimas; Antonis Nikitakis; Ioannis Papaefstathiou (DSD, 2019)

Accelerating Physics Engine Components with Embedded FPGAs. - Petros Toupas; Andreas Brokalakis; Ioannis Papaefstathiou (FPL, 2019)

Optimized FPGA Implementation of a Compute-Intensive Oil Reservoir Simulation Algorithm. - Aggelos D. Ioannou; Pavlos Malakonakis; Konstantinos Georgopoulos; Ioannis Papaefstathiou; Apostolos Dollas; Iakovos Mavroidis (SAMOS, 2019)

A Unified Novel Neural Network Approach and a Prototype Hardware Implementation for Ultra-Low Power EEG Classification. - Antonis Nikitakis; Konstantinos Makantasis; Nikolaos Tampouratzis; Ioannis Papaefstathiou (IEEE Trans. Biomed. Circuits Syst., 2019)

A novel FPGA-based system for Tumor Growth Prediction. - Konstantinos Malavazos; Maria Papadogiorgaki; Pavlos Malakonakis; Ioannis Papaefstathiou (DATE, 2020)

SqueezeJet-3: An Accelerator Utilizing FPGA MPSoCs for Edge CNN Applications. - Panagiotis Mousouliotis; Ioannis Papaefstathiou; Loukas Petrou (FCCM, 2020)

A Novel, Highly Integrated Simulator for Parallel and Distributed Systems. - Nikolaos Tampouratzis; Ioannis Papaefstathiou; Antonios Nikitakis; Andreas Brokalakis; Stamatis Andrianakis; Apostolos Dollas; Marco Marcon; Emanuele Plebani (ACM Trans. Archit. Code Optim., 2020)

UNILOGIC: A Novel Architecture for Highly Parallel Reconfigurable Systems. - Aggelos D. Ioannou; Konstantinos Georgopoulos; Pavlos Malakonakis; Dionisios N. Pnevmatikatos; Vassilis D. Papaefstathiou; Ioannis Papaefstathiou; Iakovos Mavroidis (ACM Trans. Reconfigurable Technol. Syst., 2020)

An Open-source Implementation of LSTM and GRU in the Ptolemy Simulation Framework. - Vasilis Daoulas; Nikolaos Tampouratzis; Panagiotis Mousouliotis; Ioannis Papaefstathiou (DS-RT, 2021)

Novel Reconfigurable Hardware Systems for Tumor Growth Prediction. - Konstantinos Malavazos; Maria Papadogiorgaki; Pavlos Malakonakis; Ioannis Papaefstathiou (ACM Trans. Comput. Heal., 2021)

RED-SEA: Network Solution for Exascale Architectures. - Andrea Biagioni; Paolo Cretaro; Ottorino Frezza; Francesca Lo Cicero; Alessandro Lonardo; Michele Martinelli; Pier Stanislao Paolucci; Elena Pastorelli; Francesco Simula; Matteo Turisini; Piero Vicini; Roberto Ammendola; et al. (DSD, 2022)

Making Citizens' systems more Secure: Practical Encryption Bypassing and Countermeasures. - Marios Adam Sirgiannis; Charalampos Manifavas; Ioannis Papaefstathiou (ISCC, 2022)

eProcessor: European, Extendable, Energy-Efficient, Extreme-Scale, Extensible, Processor Ecosystem. - Lluc Alvarez; Abraham Ruiz; Arnau Bigas-Soldevilla; Pavel Kuroedov; Alberto González 004; Hamsika Mahale; Noe Bustamante; Albert Aguilera; Francesco Minervini; Javier Salamero; Oscar Palomar; Vassilis Papaefstathiou; et al. (CF, 2023)

Early Results of Mapping Industrial Applications on Heterogeneous HPC Systems: The OPTIMA Project. - Dimitris Theodoropoulos; Giorgos Pekridis; Panagiotis Miliadis; Chloe Alverti; Panagiotis Mpakos; Dionisios N. Pnevmatikatos; Pavlos Malakonakis; Konstantinos Georgopoulos; Iakovos Mavroidis; Gino Perna; Marisa Zanotti; Giovanni Isotton; et al. (CF, 2023)

Optimizing Industrial Applications for Heterogeneous HPC Systems: The OPTIMA Project Intermediate stage. - Dimitris Theodoropoulos; Olivier Michel; Pavlos Malakonakis; Konstantinos Georgopoulos; Giovanni Isotton; Dionisios N. Pnevmatikatos; Ioannis Papaefstathiou; Gino Perna; Marisa Zanotti; Panagiotis Miliadis; Panagiotis Mpakos; Chloe Alverti; et al. (DATE, 2023)

VITAMIN-V: Virtual Environment and Tool-Boxing for Trustworthy Development of RISC-V Based Cloud Services. - Ramon Canal; Cristiano Pegoraro Chenet; Aggelos Arelakis; José-María Arnau; Josep Lluís Berral; Aaron Call; Stefano Di Carlo; Juan José Costa; Dimitris Gizopoulos; Vasileios Karakostas; Francesco Lubrano; Konstantinos Nikas; et al. (DSD, 2023)

SqueezeJet-3: An HLS-based Accelerator for Edge CNN Applications on SoC FPGAs. - Panagiotis Mousouliotis; Nikolaos Tampouratzis; Ioannis Papaefstathiou (ICAT, 2023)

Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services. - Aggelos Arelakis; José-María Arnau; Josep Lluis Berral; Aaron Call; Ramon Canal; Stefano Di Carlo; Juan José Costa; Dimitris Gizopoulos; Vasileios Karakostas; Francesco Lubrano; Konstantinos Nikas; Yiannis Nikolakopoulos; et al. (CoRR, 2023)

A Novel Integrated Simulation Framework for Cyber-Physical Systems Modelling. - Nikolaos Tampouratzis; Panagiotis Mousouliotis; Ioannis Papaefstathiou (IEEE Trans. Parallel Distributed Syst., 2023)

REBECCA: Reconfigurable Heterogeneous Highly Parallel Processing Platform for Safe and Secure AI. - Andreas Brokalakis; Iakovos Mavroidis; Konstantinos Georgopoulos; Pavlos Malakonakis; Konstantinos Harteros; Dimitris Andronikou; Yannis Galanomatis; Charalampos Savvakos; Grigorios Chrysos 001; Sotiris Ioannidis; Ioannis Papaefstathiou (DSD, 2024)

Fast, Accurate and Distributed Simulation of novel HPC systems incorporating ARM and RISC-V CPUs. - Nikolaos Tampouratzis; Ioannis Papaefstathiou (HPDC, 2024)

Vitamin-V: Expanding Open-Source RISC-V Cloud Environments. - Ramon Canal; Stefano Di Carlo; Dimitris Gizopoulos; Alberto Scionti; Francesco Lubrano; Josep Lluis Berral; Aaron Call; Diego Marron; Konstantinos Nikas; Dionisios N. Pnevmatikatos; Daniel Raho; Alvise Rigo; et al. (CoRR, 2024)

RED-SEA Project: Towards a new-generation European interconnect. - María Engracia Gómez; Julio Sahuquillo; Andrea Biagioni; Nikos Chrysos; Damien Berton; Ottorino Frezza; Francesca Lo Cicero; Alessandro Lonardo; Michele Martinelli; Pier Stanislao Paolucci; Elena Pastorelli; Francesco Simula; et al. (Microprocess. Microsystems, 2024)

Operationalizing Cybersecurity Knowledge: Design, Implementation & Evaluation of a Knowledge Management System for CACAO Playbooks. - Orestis Tsirakis; Konstantinos Fysarakis; Vasileios Mavroeidis; Ioannis Papaefstathiou (CoRR, 2025)