Impact of the address changing on the detection of pattern sensitive faults. - Bartosz Sokol; Ireneusz Mrozek; Wiaczeslaw Yarmolik (Information Processing and Security Systems, 2005)

Address Sequences Generation for Multiple Run Memory Testing. - S. V. Yarmolik; Ireneusz Mrozek; Bartosz Sokol (CISIM, 2007)

Multi Background Memory Testing. - Ireneusz Mrozek; Vyacheslav N. Yarmolik; Eugenia Buslowska (CISIM, 2008)

Optimal Backgrounds Selection for Multi Run Memory Testing. - Ireneusz Mrozek; Vyacheslav N. Yarmolik (DDECS, 2008)

Analysis of multibackground memory testing techniques. - Ireneusz Mrozek (Int. J. Appl. Math. Comput. Sci., 2010)

Iterative Antirandom Testing. - Ireneusz Mrozek; Vyacheslav N. Yarmolik (J. Electron. Test., 2012)

Antirandom Test Vectors for BIST in Hardware/Software Systems. - Ireneusz Mrozek; Vyacheslav N. Yarmolik (Fundam. Informaticae, 2012)

Analyses of two run march tests with address decimation for BIST procedure. - Ireneusz Mrozek; Svetlana V. Yarmolik (EWDTS, 2013)

Controlled method of random test synthesis. - Vyacheslav N. Yarmolik; Ireneusz Mrozek; Svetlana V. Yarmolik (Autom. Control. Comput. Sci., 2015)

Methods of Synthesis of Controlled Random Tests. - Ireneusz Mrozek; Vyacheslav N. Yarmolik (CISIM, 2016)

Multiple Controlled Random Testing. - Ireneusz Mrozek; Vyacheslav N. Yarmolik (Fundam. Informaticae, 2016)

Optimal Controlled Random Tests. - Ireneusz Mrozek; Vyacheslav N. Yarmolik (CISIM, 2017)

Two-Run RAM March Testing with Address Decimation. - Ireneusz Mrozek; Vyacheslav N. Yarmolik (J. Circuits Syst. Comput., 2017)

Pseudo-Exhaustive Random Access Memory Testing Based on March Tests with Random Background Variation. - Ireneusz Mrozek; Vyacheslav N. Yarmolik (EWDTS, 2018)

Transparent Memory Tests Based on the Double Address Sequences. - Ireneusz Mrozek; Vyacheslav N. Yarmolik (Entropy, 2021)

Universal Address Sequence Generator for Memory Built-in Self-test. - Ireneusz Mrozek; Nikolai A. Shevchenko; Vyacheslav N. Yarmolik (Fundam. Informaticae, 2022)