Tiling stencil computations to maximize parallelism. - Vinayaka Bandishti; Irshad Pananilath; Uday Bondhugula (SC, 2012)

An Optimizing Code Generator for a Class of Lattice-Boltzmann Computations. - Irshad Pananilath; Aravind Acharya; Vinay Vasista; Uday Bondhugula (ACM Trans. Archit. Code Optim., 2015)

Diamond Tiling: Tiling Techniques to Maximize Parallelism for Stencil Computations. - Uday Bondhugula; Vinayaka Bandishti; Irshad Pananilath (IEEE Trans. Parallel Distributed Syst., 2017)