A Safety Concept for a Railway Mixed-Criticality Embedded System Based on Multicore Partitioning. - Irune Agirre; Mikel Azkarate-askasua; Asier Larrucea; Jon Pérez 001; Tullio Vardanega; Francisco J. Cazorla (CIT/IUCC/DASC/PICom, 2015)

IEC-61508 SIL 3 Compliant Pseudo-Random Number Generators for Probabilistic Timing Analysis. - Irune Agirre; Mikel Azkarate-askasua; Carles Hernández 001; Jaume Abella 001; Jon Pérez 001; Tullio Vardanega; Francisco J. Cazorla (DSD, 2015)

A Modular Safety Case for an IEC-61508 Compliant Generic Hypervisor. - Asier Larrucea; Jon Pérez 001; Irune Agirre; Vicent Brocal; Roman Obermaisser (DSD, 2015)

Temporal independence validation of an IEC-61508 compliant mixed-criticality system based on multicore partitioning. - Asier Larrucea; Irune Agirre; Carlos Fernando Nicolás; Jon Pérez 001; Mikel Azkarate-askasua; Ton Trapman (FDL, 2015)

PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis. - Francisco J. Cazorla; Jaume Abella 001; Jan Andersson; Tullio Vardanega; Francis Vatrinet; Iain Bate; Ian Broster; Mikel Azkarate-askasua; Franck Wartel; Liliana Cucu; Fabrice Cros; Glenn Farrall; et al. (DSD, 2016)

Automotive Safety Concept Definition for Mixed-Criticality Integration on a COTS Multicore. - Irune Agirre; Mikel Azkarate-askasua; Asier Larrucea; Jon Pérez 001; Tullio Vardanega; Francisco J. Cazorla (SAFECOMP Workshops, 2016)

Mitigating Software-Instrumentation Cache Effects in Measurement-Based Timing Analysis. - Enrique Díaz; Jaume Abella 001; Enrico Mezzetti; Irune Agirre; Mikel Azkarate-askasua; Tullio Vardanega; Francisco J. Cazorla (WCET, 2016)

Software Time Reliability in the Presence of Cache Memories. - Suzana Milutinovic; Jaume Abella 001; Irune Agirre; Mikel Azkarate-askasua; Enrico Mezzetti; Tullio Vardanega; Francisco J. Cazorla (Ada-Europe, 2017)

EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application. - Enrico Mezzetti; Mikel Fernández; Alen Bardizbanyan; Irune Agirre; Jaume Abella 001; Tullio Vardanega; Francisco J. Cazorla (RTAS, 2017)

On the tailoring of CAST-32A certification guidance to real COTS multicore architectures. - Irune Agirre; Jaume Abella 001; Mikel Azkarate-askasua; Francisco J. Cazorla (SIES, 2017)

Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262. - Irune Agirre; Francisco J. Cazorla; Jaume Abella 001; Carles Hernández 001; Enrico Mezzetti; Mikel Azkarate-askatsua; Tullio Vardanega (IEEE Trans. Reliab., 2018)

Development and certification of mixed-criticality embedded systems based on probabilistic timing analysis. - Irune Agirre (2018)

UP2DATE: Safe and secure over-the-air software updates on high-performance mixed-criticality systems. - Irune Agirre; Peio Onaindia; Tomaso Poggi; Irune Yarza; Francisco J. Cazorla; Leonidas Kosmidis; Kim Grüttner; Mohammed Abuteir; Jan Loewe; Juan M. Orbegozo; Stefania Botta (DSD, 2020)

Safe and secure software updates on high-performance embedded systems. - Irune Agirre (DSN Workshops, 2020)

The UP2DATE Baseline Research Platforms. - Alvaro Jover-Alvarez; Alejandro J. Calderón; Iván Rodriguez; Leonidas Kosmidis; Kazi Asifuzzaman; Patrick Uven; Kim Grüttner; Tomaso Poggi; Irune Agirre (DATE, 2021)

Safety and Security Concept for Software Updates on Mixed-criticality Systems. - Imanol Mugarza; Irune Yarza; Irune Agirre; Fabrizio Lussiana; Stefania Botta (ICSRS, 2021)

Multi-core Devices for Safety-critical Systems: A Survey. - Jon Pérez-Cerrolaza; Roman Obermaisser; Jaume Abella 001; Francisco J. Cazorla; Kim Grüttner; Irune Agirre; Hamidreza Ahmadian; Imanol Allende (ACM Comput. Surv., 2021)

Towards functional safety compliance of matrix-matrix multiplication for machine learning-based autonomous systems. - Javier Fernández 004; Jon Pérez 001; Irune Agirre; Imanol Allende; Jaume Abella 001; Francisco J. Cazorla (J. Syst. Archit., 2021)

Safe and secure software updates on high-performance mixed-criticality systems: The UP2DATE approach. - Irune Agirre; Irune Yarza; Imanol Mugarza; Jacopo Binchi; Peio Onaindia; Tomaso Poggi; Francisco J. Cazorla; Leonidas Kosmidis; Kim Grüttner; Patrick Uven; Mohammed Abuteir; Jan Loewe; et al. (Microprocess. Microsystems, 2021)

A Methodology for Selective Protection of Matrix Multiplications: A Diagnostic Coverage and Performance Trade-off for CNNs Executed on GPUs. - Javier Fernández 004; Irune Agirre; Jon Pérez-Cerrolaza; Jaume Abella 001; Francisco J. Cazorla (ICSRS, 2022)

Safety and security collaborative analysis framework for high-performance embedded computing devices. - Irune Yarza; Irune Agirre; Imanol Mugarza; Jon Pérez-Cerrolaza (Microprocess. Microsystems, 2022)

SAFEXPLAIN: Safe and Explainable Critical Embedded Systems Based on AI. - Jaume Abella 001; Jon Pérez 001; Cristofer Englund; Bahram Zonooz; Gabriele Giordana; Carlo Donzella; Francisco J. Cazorla; Enrico Mezzetti; Isabel Serra; Axel Brando; Irune Agirre; Fernando Eizaguirre; et al. (DATE, 2023)

UP2DATE software updating framework compliance with safety and security regulations and standards. - Irune Agirre; Alejandro J. Calderón; Irune Yarza; Imanol Mugarza; David García Villaescusa; Lucas Borracci; Patrick Uven; Alvaro Jover-Alvarez (DSD, 2023)

Software Updates Monitoring & Anomaly Detection. - Imanol Etxezarreta Martinez; David García Villaescusa; Imanol Mugarza; Irune Yarza; Irune Agirre (IoTBDS, 2023)

Towards a Contract-Based Definition of Update-Compatibility - Modelling Safety Integration Criteria. - Irune Yarza; Irune Agirre; Imanol Mugarza; Gregor Nitsche; Patrick Uven; Juan Maria Orbegozo (ITSC, 2023)

ROSGuard: A Bandwidth Regulation Mechanism for ROS2-based Applications. - Jon Altonaga Puente; Enrico Mezzetti; Irune Agirre; Jaume Abella 001; Francisco Javier Cazorla-Almeida (CoRR, 2025)