Predictable programming on a precision timed architecture. - Ben Lickly; Isaac Liu; Sungjun Kim; Hiren D. Patel; Stephen A. Edwards; Edward A. Lee (CASES, 2008)

A disruptive computer design idea: Architectures with repeatable timing. - Stephen A. Edwards; Sungjun Kim; Edward A. Lee; Isaac Liu; Hiren D. Patel; Martin Schoeberl (ICCD, 2009)

PRET DRAM controller: bank privatization for predictability and temporal isolation. - Jan Reineke 001; Isaac Liu; Hiren D. Patel; Sungjun Kim; Edward A. Lee (CODES+ISSS, 2011)

Temporal isolation on multiprocessing architectures. - Dai N. Bui; Edward A. Lee; Isaac Liu; Hiren D. Patel; Jan Reineke 001 (DAC, 2011)

A Heterogeneous Architecture for Evaluating Real-Time One-Dimensional Computational Fluid Dynamics on FPGAs. - Isaac Liu; Edward A. Lee; Matthew Viele; Guoqiang Wang; Hugo A. Andrade (FCCM, 2012)

A PRET microarchitecture implementation with repeatable timing and competitive performance. - Isaac Liu; Jan Reineke 001; David Broman; Michael Zimmer 001; Edward A. Lee (ICCD, 2012)

Precision Timed Machines. - Isaac Liu (2012)

A hierarchy tree data structure for behavior-based user segment representation. - Yang Liu; Xuejiao Kang; Sathya Iyer; Idris Malik; Ruixuan Li 014; Juan Wang; Xinchen Lu; Xiangxue Zhao; Dayong Wang; Menghan Liu; Isaac Liu; Feng Liang; et al. (CoRR, 2025)