An efficient regular matrix inversion circuit architecture for MIMO processing. - Isabelle LaRoche; Sébastien Roy 002 (ISCAS, 2006)

An Efficient VLSI Architecture of a Layered Space-Time Receiver. - Isabelle LaRoche; Sébastien Roy 002 (VTC Spring, 2007)

Baseband MIMO receiver architecture for MC-CDMA and its FPGA implementation. - Isabelle LaRoche; Sébastien Roy 002; Paul Fortier; Jean-Francois Beaumont (WiMob, 2010)

Locally-connected Viterbi decoder architectures and their VLSI implementation for LDPC and convolutional codes. - Ahmed Refaey; Sébastien Roy 002; Isabelle LaRoche; Benoit Gosselin (ACSSC, 2013)