Test generation for sequential circuits using parallel fault simulation with random inputs. - Yuzo Takamatsu; Isao Higashi; Tsuyoshi Kodama (Syst. Comput. Jpn., 1995)

Accelerated Test Points Selection Method for Scan-Based BIST. - Michinobu Nakao; Kazumi Hatayama; Isao Higashi (Asian Test Symposium, 1997)