Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond. - Koichiro Ishibashi; Tetsuya Fujimoto; Takahiro Yamashita; Hiroyuki Okada; Yukio Arima; Yasuyuki Hashimoto; Kohji Sakata; Isao Minematsu; Yasuo Itoh; Haruki Toda; Motoi Ichihashi; Yoshihide Komatsu; et al. (IEICE Trans. Electron., 2006)