A 2.5GHz, 6.9mW ΔΣ modulator with standard cell design in 45nm-LP CMOS using time-interleaving. - Paolo Madoglio; Ashoke Ravi; Luis Cuellar 001; Stefano Pellerano; Parmoon Seddighrad; Ismael Lomeli; Yorgos Palaskas (ESSCIRC, 2009)

A 2.5-GHz, 6.9-mW, 45-nm-LP CMOS, ΔΣ Modulator Based on Standard Cell Design With Time-Interleaving. - Paolo Madoglio; Ashoke Ravi; Luis Cuellar 001; Stefano Pellerano; Parmoon Seddighrad; Ismael Lomeli; Yorgos Palaskas (IEEE J. Solid State Circuits, 2010)