A single chip solution for text-to-speech synthesis. - Ozan Aktan; I. Faik Baskaya; Günhan Dündar (ECCTD, 2005)

Hierarchical Placement for Large-scale FPAA. - I. Faik Baskaya; Sasank Reddy; Sung Kyu Lim; David V. Anderson (FPL, 2005)

Image processing system using a programmable transform imager. - Jungwon Lee; Abhishek Bandyopadhyay; I. Faik Baskaya; Ryan W. Robucci; Paul E. Hasler (ICASSP (5), 2005)

Mapping algorithm for large-scale field programmable analog array. - I. Faik Baskaya; Sasank Reddy; Sung Kyu Lim; Tyson S. Hall; David V. Anderson (ISPD, 2005)

Placement for large-scale floating-gate field-programable analog arrays. - I. Faik Baskaya; Sasank Reddy; Sung Kyu Lim; David V. Anderson (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array. - I. Faik Baskaya; Brian Gestner; Christopher M. Twigg; Sung Kyu Lim; David V. Anderson; Paul E. Hasler (FCCM, 2007)

A Self-Contained Large-Scale FPAA Development Platform. - Christopher M. Twigg; Paul E. Hasler; I. Faik Baskaya (ISCAS, 2007)

A generic reconfigurable array specification and programming environment (GRASPER). - Faik Baskaya; David V. Anderson; Paul E. Hasler; Sung Kyu Lim (ECCTD, 2009)

Net-Sensitivity-Based Optimization of Large-Scale Field-Programmable Analog Array (FPAA) Placement and Routing. - I. Faik Baskaya; David V. Anderson; Sung Kyu Lim (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Physical design automation for large scale field programmable analog arrays. - Ismail Faik Baskaya (2009)

A Floating-Gate-Based Field-Programmable Analog Array. - Arindam Basu; Stephen Brink; Craig Schlottmann; Shubha Ramakrishnan; Csaba Petre; Scott Koziol; I. Faik Baskaya; Christopher M. Twigg; Paul E. Hasler (IEEE J. Solid State Circuits, 2010)

A Verifiable High Level Data Path Synthesis Framework. - Gorker Alp Malazgirt; Ender Culha; Alper Sen 001; I. Faik Baskaya; Arda Yurdakul (DSD, 2012)

High-Level verifiable data-path Synthesis for DSP systems. - Ender Culha; Gorker Alp Malazgirt; I. Faik Baskaya; Alper Sen 001; Arda Yurdakul (SIU, 2012)

Synthesis of clock trees for Sampled-Data Analog IC blocks. - Bilgiday Yuce; Seyrani Korkmaz; Vahap Baris Esen; Fatih Temizkan; Cihan Tunc; Gokhan Guner; I. Faik Baskaya; Iskender Agi; Günhan Dündar; H. Fatih Ugurdag (EWDTS, 2013)

Integrating circuit analyses for assertion-based verification of programmable AMS circuits. - Dogan Ulus; Alper Sen 001; I. Faik Baskaya (FDL, 2013)

Analog layer extensions for analog/mixed-signal assertion languages. - Dogan Ulus; Alper Sen 001; I. Faik Baskaya (VLSI-SoC, 2013)

Model based hierarchical optimization strategies for analog design automation. - Engin Afacan; Simge Ay; Francisco V. Fernández 001; Günhan Dündar; I. Faik Baskaya (DATE, 2014)

Reliability assessment of CMOS differential cross-coupled LC oscillators and a novel on chip self-healing approach against aging phenomena. - Engin Afacan; Günhan Dündar; I. Faik Baskaya (Microelectron. Reliab., 2014)

A hybrid Quasi Monte Carlo method for yield aware analog circuit sizing tool. - Engin Afacan; Gönenç Berkol; Ali Emre Pusane; Günhan Dündar; I. Faik Baskaya (DATE, 2015)

Design of blocks for a Field Programmable Mixed Array (FPMA). - Ata Sarrafinazhad; Ismail Kara; Faik Baskaya (EWDTS, 2015)

A novel yield aware multi-objective analog circuit optimization tool. - Gönenç Berkol; Engin Afacan; Günhan Dündar; Ali Emre Pusane; I. Faik Baskaya (ISCAS, 2015)

A two-step layout-in-the-loop design automation tool. - Gönenç Berkol; Ahmet Unutulmaz; Engin Afacan; Günhan Dündar; Francisco V. Fernández 001; Ali Emre Pusane; I. Faik Baskaya (NEWCAS, 2015)

Semi-empirical aging model development via accelerated aging test. - Engin Afacan; Günhan Dündar; Ali Emre Pusane; I. Faik Baskaya (SMACD, 2016)

A lifetime-aware analog circuit sizing tool. - Engin Afacan; Gönenç Berkol; Günhan Dündar; Ali Emre Pusane; I. Faik Baskaya (Integr., 2016)

An analog circuit synthesis tool based on efficient and reliable yield estimation. - Engin Afacan; Gönenç Berkol; Günhan Dündar; Ali Emre Pusane; I. Faik Baskaya (Microelectron. J., 2016)

Aging signature properties and an efficient signature determination tool for online monitoring. - Engin Afacan; Günhan Dündar; Ali Emre Pusane; Mustafa Berke Yelten; I. Faik Baskaya (Integr., 2017)

A Rare Event Based Yield Estimation Methodology for Analog Circuits. - Izel Cagin Odabasi; Mustafa Berke Yelten; Engin Afacan; I. Faik Baskaya; Ali Emre Pusane; Günhan Dündar (DDECS, 2018)

On Chip Reconfigurable CMOS Analog Circuit Design and Automation Against Aging Phenomena: Sense and React. - Engin Afacan; Günhan Dündar; I. Faik Baskaya; Ali Emre Pusane; Mustafa Berke Yelten (ACM Trans. Design Autom. Electr. Syst., 2019)

A modified relay-race algorithm for floorplanning in PCB and IC design. - Mert Vatansever; Faik Baskaya (Turkish J. Electr. Eng. Comput. Sci., 2020)

ACTreS: Analog Clock Tree Synthesis. - Bilgiday Yuce; H. Fatih Ugurdag; Iskender Agi; Gokhan Guner; Vahap Baris Esen; Seyrani Korkmaz; I. Faik Baskaya; Günhan Dündar (CoRR, 2021)

Convolutional Neural Network-Based Signal Classification in Real Time. - Ramazan Cetin; Selen Gecgel; Gunes Karabulut-Kurt; Faik Baskaya (IEEE Embed. Syst. Lett., 2021)

PLL Based Synchronous Read-Out for Resonant Biosensors. - Zeynep Duygu Sütgöl; Günhan Dündar; Faik Baskaya (SIU, 2022)

Jitter Modeling for High Precision Frequency Measurements in Oscillator Circuits. - Utku Arda Akinci; Muhammed Salih Inneci; Zeynep Duygu Sütgöl; Faik Baskaya; Günhan Dündar (SMACD, 2023)

FPGA implementation of double-head SalsaNext: a CNN-based model for LiDAR point cloud segmentation. - Muhammed Yasin Adiyaman; Faik Baskaya (J. Real Time Image Process., 2025)