An Examination of PRPG Selection Approaches for Large, Industrial Designs. - Ismet Bayraktaroglu; K. Udawatta; Alex Orailoglu (Asian Test Symposium, 1998)

Low-Cost On-Line Test for Digital Filters. - Ismet Bayraktaroglu; Alex Orailoglu (VTS, 1999)

ANNSyS: an Analog Neural Network Synthesis System. - Ismet Bayraktaroglu; Arif Selçuk Ögrenci; Günhan Dündar; Sina Balkir; Ethem Alpaydin (Neural Networks, 1999)

Accumulation-based concurrent fault detection for linear digital state variable systems. - Ismet Bayraktaroglu; Alex Orailoglu (Asian Test Symposium, 2000)

Improved fault diagnosis in scan-based BIST via superposition. - Ismet Bayraktaroglu; Alex Orailoglu (DAC, 2000)

Test Synthesis for Mixed-Signal SOC Paths. - Sule Ozev; Ismet Bayraktaroglu; Alex Orailoglu (DATE, 2000)

Low cost concurrent test implementation for linear digital systems. - Ismet Bayraktaroglu; Alex Orailoglu (ETW, 2000)

Cost effective digital filter design for concurrent test. - Ismet Bayraktaroglu; Alex Orailoglu (ICASSP, 2000)

Unifying methodologies for high fault coverage concurrent and off-line test of digital filters. - Ismet Bayraktaroglu; Alex Orailoglu (ISCAS, 2000)

Deterministic partitioning techniques for fault diagnosis in scan-based BIST. - Ismet Bayraktaroglu; Alex Orailoglu (ITC, 2000)

Invariance-Based On-Line Test for RTL Controller-Datapath Circuits. - Yiorgos Makris; Ismet Bayraktaroglu; Alex Orailoglu (VTS, 2000)

Selecting a PRPG: Randomness, Primitiveness, or Sheer Luck? - Ismet Bayraktaroglu; Alex Orailoglu (Asian Test Symposium, 2001)

Test Volume and Application Time Reduction Through Scan Chain Concealment. - Ismet Bayraktaroglu; Alex Orailoglu (DAC, 2001)

Diagnosis for scan-based BIST: reaching deep into the signatures. - Ismet Bayraktaroglu; Alex Orailoglu (DATE, 2001)

Improved Methods for Fault Diagnosis in Scan-Based BIST. - Ismet Bayraktaroglu; Alex Orailoglu (LATW, 2001)

Concurrent test for digital linear systems. - Ismet Bayraktaroglu; Alex Orailoglu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Gate Level Fault Diagnosis in Scan-Based BIST. - Ismet Bayraktaroglu; Alex Orailoglu (DATE, 2002)

Dynamic test data transformations for average and peak power reductions. - Ozgur Sinanoglu; Ismet Bayraktaroglu; Alex Orailoglu (ETW, 2002)

Scan Power Reduction Through Test Data Transition Frequency Analysis. - Ozgur Sinanoglu; Ismet Bayraktaroglu; Alex Orailoglu (ITC, 2002)

Test Power Reduction through Minimization of Scan Chain Transitions. - Ozgur Sinanoglu; Ismet Bayraktaroglu; Alex Orailoglu (VTS, 2002)

Cost-Effective Deterministic Partitioning for Rapid Diagnosis in Scan-Based BIST. - Ismet Bayraktaroglu; Alex Orailoglu (IEEE Des. Test Comput., 2002)

Test application time and volume compression through seed overlapping. - Wenjing Rao; Ismet Bayraktaroglu; Alex Orailoglu (DAC, 2003)

Instruction Based BIST for Board/System Level Test of External Memories and Internconnects. - Olivier Caty; Ismet Bayraktaroglu; Amitava Majumdar 002; Richard Lee; John Bell; Lisa Curhan (ITC, 2003)

Decompression Hardware Determination for Test Volume and Time Reduction through Unified Test Pattern Compaction and Compression. - Ismet Bayraktaroglu; Alex Orailoglu (VTS, 2003)

Reducing Average and Peak Test Power Through Scan Chain Modification. - Ozgur Sinanoglu; Ismet Bayraktaroglu; Alex Orailoglu (J. Electron. Test., 2003)

Concurrent Application of Compaction and Compression for Test Time and Data Volume Reduction in Scan Designs. - Ismet Bayraktaroglu; Alex Orailoglu (IEEE Trans. Computers, 2003)

ATPG based functional test for data paths: application to a floating point unit. - Ismet Bayraktaroglu; Manuel d'Abreu (HLDVT, 2004)

Seamless Test of Digital Components in Mixed-Signal Paths. - Sule Ozev; Ismet Bayraktaroglu; Alex Orailoglu (IEEE Des. Test Comput., 2004)

Enhancing reliability of RTL controller-datapath circuits via Invariant-based concurrent test. - Yiorgos Makris; Ismet Bayraktaroglu; Alex Orailoglu (IEEE Trans. Reliab., 2004)

Microprocessor silicon debug based on failure propagation tracing. - Olivier Caty; Peter Dahlgren; Ismet Bayraktaroglu (ITC, 2005)

Highly Configurable Programmable Built-In Self Test Architecture for High-Speed Memories. - Ismet Bayraktaroglu; Olivier Caty; Yickkei Wong (VTS, 2005)

The Construction of Optimal Deterministic Partitionings in Scan-Based BIST Fault Diagnosis: Mathematical Foundations and Cost-Effective Implementations. - Ismet Bayraktaroglu; Alex Orailoglu (IEEE Trans. Computers, 2005)

Cache Resident Functional Microprocessor Testing: Avoiding High Speed IO Issues. - Ismet Bayraktaroglu; Jim Hunt; Daniel Watkins (ITC, 2006)

ChipNeMo: Domain-Adapted LLMs for Chip Design. - Mingjie Liu; Teodor-Dumitru Ene; Robert Kirby 001; Chris Cheng; Nathaniel Ross Pinckney; Rongjian Liang; Jonah Alben; Himyanshu Anand; Sanmitra Banerjee; Ismet Bayraktaroglu; Bonita Bhaskaran; Bryan Catanzaro; et al. (CoRR, 2023)