Intelligent console - A universal user interface of a computer system. - Itsujiro Arita (Operating Systems Engineering, 1980)

Performance evaluation of the binary tree access mechanism in mimd type parallel computers. - Toshinori Sueyoshi; Keizo Saisho; Itsujiro Arita (Syst. Comput. Jpn., 1986)

Towards a Portable Cluster Computing Environment Supporting Single System Image. - Tatsuya Asazu; Bernady O. Apduhan; Itsujiro Arita (ICPP Workshops, 1999)

Sending an Image to a Large Number of Nodes in Short Time using TCP. - Takayuki Hirahara; Takashi Yamanoue; Hiroyuki Anzai; Itsujiro Arita (IEEE International Conference on Multimedia and Expo (II), 2000)

Partial Resolution in Data Value Predictors. - Toshinori Sato; Itsujiro Arita (ICPP, 2000)

Table size reduction for data value predictors by exploiting narrow width values. - Toshinori Sato; Itsujiro Arita (ICS, 2000)

Comprehensive Evaluation of an Instruction Reissue Mechanism. - Toshinori Sato; Itsujiro Arita (ISPAN, 2000)

The KIT COSMOS Processor: Introducing CONDOR. - Toshinori Sato; Itsujiro Arita (PDPTA, 2000)

Tolerating Transient Faults through an Instruction Reissue Mechanism. - Toshinori Sato; Itsujiro Arita (PDCS, 2001)

Execution Latency Reduction via Variable Latency Pipeline and Instruction Reuse. - Toshinori Sato; Itsujiro Arita (Euro-Par, 2001)

Influence of Compiler Optimizations on Value Prediction. - Toshinori Sato; Akihiko Hamano; Kiichi Sugitani; Itsujiro Arita (HPCN Europe, 2001)

Evaluating the Performance of a DSM Cluster with Improved Communication Subsystem. - Yasushi Shimono; Bernady O. Apduhan; Itsujiro Arita; Yoshimasa Ohnishi (ICOIN, 2001)

In Search of Efficient Reliable Processor Design. - Toshinori Sato; Itsujiro Arita (ICPP, 2001)

Evaluating Low-Cost Fault-Tolerance Mechanism for Microprocessors on Multimedia Applications. - Toshinori Sato; Itsujiro Arita (PRDC, 2001)

Simplifying Instruction Issue Logic in Superscalar Processors. - Toshinori Sato; Itsujiro Arita (DSD, 2002)

Low-Cost Value Predictors Using Frequent Value Locality. - Toshinori Sato; Itsujiro Arita (ISHPC, 2002)

Reducing Energy Consumption via Low-Cost Value Prediction. - Toshinori Sato; Itsujiro Arita (PATMOS, 2002)

The KIT COSMOS Processor: An Application of Multi-Threading for Dynamic Optimization. - Toshiyuki Yamamoto; Kou Morita; Toshinori Sato; Itsujiro Arita (PDPTA, 2002)

The development and evaluation of SHOKE2000: The PCI-based FPGA card. - Koichiro Tanaka; Itsujiro Arita (Syst. Comput. Jpn., 2002)

Combining variable latency pipeline with instruction reuse for execution latency reduction. - Toshinori Sato; Itsujiro Arita (Syst. Comput. Jpn., 2003)

A trace-level value predictor for Contrail processors. - Takenori Koushiro; Toshinori Sato; Itsujiro Arita (SIGARCH Comput. Archit. News, 2003)

An Indoor Location-Aware Mobile Navigation Service for the Handicapped and the Elderly. - Toshihiro Uchibayashi; Bernady O. Apduhan; Itsujiro Arita (MoMM, 2007)

Navilite: a Lightweight Indoor Location-Aware Mobile Navigation Service for the Handicapped and the Elderly. - Toshihiro Uchibayashi; Bernady O. Apduhan; Itsujiro Arita (J. Mobile Multimedia, 2008)