Reducing TMR overhead by combining approximate circuit, transistor topology and input permutation approaches. - Iuri A. C. Gomes; Fernanda Gusmão de Lima Kastensmidt (SBCCI, 2013)

Methodology for achieving best trade-off of area and fault masking coverage in ATMR. - Iuri A. C. Gomes; Mayler G. A. Martins; Fernanda Lima Kastensmidt; André Inácio Reis; Renato P. Ribas; Sylvain P. Novales (LATW, 2014)

Using only redundant modules with approximate logic to reduce drastically area overhead in TMR. - Iuri A. C. Gomes; Mayler G. A. Martins; André Inácio Reis; Fernanda Lima Kastensmidt (LATS, 2015)

Exploring the use of approximate TMR to mask transient faults in logic with low area overhead. - Iuri A. C. Gomes; Mayler G. A. Martins; André Inácio Reis; Fernanda Lima Kastensmidt (Microelectron. Reliab., 2015)