Asynchronous packet routers. - Chris R. Jesshope; Ivailo M. Nedelchev (Interconnection Networks and Mapping and Scheduling Parallel Computations, 1994)

Basic building blocks for asynchronous packet routers. - Ivailo M. Nedelchev; Chris R. Jesshope (Great Lakes Symposium on VLSI, 1994)

Low-latency asynchronous FIFO buffers. - Jelio Todorov Yantchev; C. G. Huang; Mark B. Josephs; Ivailo M. Nedelchev (ASYNC, 1995)

Asynchronous VLSI design. - Ivailo M. Nedelchev (1995)

Power Compiler: A Gate-Level Power Optimization and Synthesis System. - Benjamin Chen; Ivailo M. Nedelchev (ICCD, 1997)