On-line task management for a reconfigurable cryptographic architecture. - Ivan Beretta; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (IPDPS, 2009)

Operating system runtime management of partially dynamically reconfigurable embedded systems. - Marco D. Santambrogio; Vincenzo Rana; Ivan Beretta; Donatella Sciuto (ESTIMedia, 2010)

Run-time mapping of applications on FPGA-based reconfigurable systems. - Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (ISCAS, 2010)

A high-performance parallel implementation of the Chambolle algorithm. - Abdulkadir Akin; Ivan Beretta; A. A. Nacci; Vincenzo Rana; Marco D. Santambrogio; David Atienza (DATE, 2011)

A Hybrid Mapping-Scheduling Technique for Dynamically Reconfigurable Hardware. - Juan Antonio Clemente; Vincenzo Rana; Donatella Sciuto; Ivan Beretta; David Atienza (FPL, 2011)

Island-Based Adaptable Embedded System Design. - Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (IEEE Embed. Syst. Lett., 2011)

A Mapping Flow for Dynamically Reconfigurable Multi-Core System-on-Chip Design. - Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

B2IRS: A Technique to Reduce BAN-BAN Interferences in Wireless Sensor Networks. - Paolo Roberto Grassi; Vincenzo Rana; Ivan Beretta; Donatella Sciuto (BSN, 2012)

Knowledge-based design space exploration of wireless sensor networks. - Paolo Roberto Grassi; Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (CODES+ISSS, 2012)

Design exploration of energy-performance trade-offs for wireless sensor networks. - Ivan Beretta; Francisco J. Rincón; Nadia Khaled; Paolo Roberto Grassi; Vincenzo Rana; David Atienza (DAC, 2012)

Tacit Consent: A Technique to Reduce Redundant Transmissions from Spatially Correlated Nodes in Wireless Sensor Networks. - Paolo Roberto Grassi; Vincenzo Rana; Ivan Beretta; Donatella Sciuto (DSD, 2012)

Model-based design for wireless body sensor network nodes. - Ivan Beretta; Francisco J. Rincón; Nadia Khaled; Paolo Roberto Grassi; Vincenzo Rana; David Atienza; Donatella Sciuto (LATW, 2012)

A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices. - Alessandro Antonio Nacci; Vincenzo Rana; Francesco Bruschi; Donatella Sciuto; Ivan Beretta; David Atienza (DAC, 2013)

Design Methods for Parallel Hardware Implementation of Multimedia Iterative Algorithms. - Vincenzo Rana; Alessandro Antonio Nacci; Ivan Beretta; Marco D. Santambrogio; David Atienza; Donatella Sciuto (IEEE Des. Test, 2013)

Hardware/software approach for code synchronization in low-power multi-core sensor nodes. - Rubén Braojos; Ahmed Yasir Dogan; Ivan Beretta; Giovanni Ansaloni; David Atienza (DATE, 2014)

A Wireless Body Sensor Network for Activity Monitoring with Low Transmission Overhead. - Rubén Braojos; Ivan Beretta; Jeremy Constantin; Andreas Peter Burg; David Atienza (EUC, 2014)

Early Classification of Pathological Heartbeats on Wireless Body Sensor Nodes. - Rubén Braojos; Ivan Beretta; Giovanni Ansaloni; David Atienza (Sensors, 2014)

A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms. - Juan Antonio Clemente; Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (ACM Trans. Reconfigurable Technol. Syst., 2014)

PushPush: Seamless integration of hardware and software objects via function calls over AXI. - Shane T. Fleming; Ivan Beretta; David B. Thomas; George A. Constantinides; Dan R. Ghica (FPL, 2015)

Efficient Hardware Design of Iterative Stencil Loops. - Vincenzo Rana; Ivan Beretta; Francesco Bruschi; Alessandro Antonio Nacci; David Atienza; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Parallelizing the Chambolle Algorithm for Performance-Optimized Mapping on FPGA Devices. - Ivan Beretta; Vincenzo Rana; Abdulkadir Akin; Alessandro Antonio Nacci; Donatella Sciuto; David Atienza (ACM Trans. Embed. Comput. Syst., 2016)