On-Line Current Testing for a Microprocessor Based Application with an Off-Chip Sensor. - Bartomeu Alorda; Ivan de Paúl; Jaume Segura 001; T. Miller (IOLTW, 2000)

Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments. - Ivan de Paúl; M. Rosales; Bartomeu Alorda; Jaume Segura 001; Charles F. Hawkins; Jerry M. Soden (VTS, 2001)

SEU fault injection in simulation environments: example of VHDL configuration on FPGA device. - Ivan de Paúl; Miquel Roca 001; Oscar Calvo; Raul Velazco (LATW, 2002)

A BIST-based Charge Analysis for Embedded Memories. - Bartomeu Alorda; Vicent Canals; Ivan de Paúl; Jaume Segura 001 (IOLTS, 2004)

A Fully CMOS Low-Cost Chaotic Neural Network. - José Luis Rosselló; Sebastià A. Bota; Vicent Canals; Ivan de Paúl; Jaume Segura 001 (IJCNN, 2006)

Charge-based testing BIST for embedded memories. - Bartomeu Alorda; Ivan de Paúl; Jaume Segura 001 (IET Comput. Digit. Tech., 2007)

Using stochastic logic for efficient pattern recognition analysis. - José Luis Rosselló; Vincent Canals; Ivan de Paúl; Jaume Segura 001 (IJCNN, 2008)

A simple CMOS chaotic integrated circuit. - José Luis Rosselló; Vincent Canals; Ivan de Paúl; Sebastià A. Bota; Antoni Morro (IEICE Electron. Express, 2008)

Self-configuring spiking neural networks. - José Luis Rosselló; Ivan de Paúl; Vincent Canals (IEICE Electron. Express, 2008)

Spiking Neural Network Self-configuration for Temporal Pattern Recognition Analysis. - José Luis Rosselló; Ivan de Paúl; Vincent Canals; Antoni Morro (ICANN (1), 2009)

Practical Hardware Implementation of Self-configuring Neural Networks. - José Luis Rosselló; Vincent Canals; Antoni Morro; Ivan de Paúl (ISNN (3), 2009)

Accurate alpha soft error rate evaluation in SRAM memories. - Sebastià A. Bota; Gabriel Torrens; Ivan de Paúl; Bartomeu Alorda; L. A. Segura (IOLTS, 2013)

Bistability in a CMOS-MEMS Thermally Tuned Microbeam Resonator. - Joan Barceló; Ivan de Paúl; Sebastià A. Bota; Jaume Segura 001; Jaume Verd (ISCAS, 2018)

Fully Integrated Front-End CMOS-MEMS Transducer for Low-Cost Real-Time Breath Monitoring. - Rafel Perelló-Roig; Francisca Orvay; Ivan de Paúl; Jaume Verd; Sebastià A. Bota; Jaume Segura 001 (IEEE SENSORS, 2022)

A Compact Double-Exponential Circuit for Single Event Transient Emulation. - Sebastià A. Bota; Salvador Barceló; Gabriel Torrens; Rafel Perelló; Jaume Verd; Ivan de Paúl; Jaume Segura 001 (DCIS, 2023)

Design Guidelines for β-Multiplier Current Reference Circuits. - Sebastià A. Bota; Rafel Perelló; Salvador Barceló; Ivan de Paúl; Jaume Segura 001; Jaume Verd (DCIS, 2024)

SRAM Alpha-SER Estimation From Word-Line Voltage Margin Measurements: Design Architecture and Experimental Results. - Gabriel Torrens; Ivan de Paúl; Bartomeu Alorda; Sebastià A. Bota; Jaume Segura 001 (CoRR, 2024)