Pipelined Fast 2-D DCT Architecture for JPEG Image Compression. - Luciano Volcan Agostini; Sergio Bampi; Ivan Saraiva Silva (SBCCI, 2001)

Pipelined Entropy Coders for JPEG Compression. - Luciano Volcan Agostini; Ivan Saraiva Silva; Sergio Bampi (SBCCI, 2002)

Techniques and Mechanisms for Dynamic Reconfiguration in an Image Processor. - Marcos R. Boschetti; Alexandro M. S. Adário; Ivan Saraiva Silva; Sergio Bampi (SBCCI, 2002)

X4CP32: A Coarse Grain General Purpose Reconfigurable Microprocessor. - Rodrigo Soares; Arnaldo Azevedo; Ivan Saraiva Silva (IPDPS, 2003)

X4CP32: A New Parallel/Reconfigurable General-Purpose Processor. - Rodrigo Soares; Arnaldo Azevedo; Ivan Saraiva Silva (SBAC-PAD, 2003)

A New Hybrid Parallel/Reconfigurable Architecture: The X4CP32. - Arnaldo Azevedo; Rodrigo Soares; Ivan Saraiva Silva (SBCCI, 2003)

Papílio Cryptography Algorithm. - Frederiko Stenio de Araújo; Karla Darlene Nempomuceno Ramos; Benjamín René Callejas Bedregal; Ivan Saraiva Silva (CIS, 2004)

A Run-Time Reconfigurable Datapath Architecture for Image Processing Applications. - Marcos R. Boschetti; Ivan Saraiva Silva; Sergio Bampi (DATE, 2004)

Throughput and Reconfiguration Time Trade-Offs: From Static to Dynamic Reconfiguration in Dedicated Image Filters. - Marcos R. Boschetti; Sergio Bampi; Ivan Saraiva Silva (FPL, 2004)

When reconfigurable architecture meets network-on-chip. - Rodrigo Soares; Ivan Saraiva Silva; Arnaldo Azevedo (SBCCI, 2004)

Parallel color space converters for JPEG image compression. - Luciano Volcan Agostini; Ivan Saraiva Silva; Sergio Bampi (Microelectron. Reliab., 2004)

A FPGA Based Design of a Multiplierless and Fully Pipelined JPEG Compressor. - Luciano Volcan Agostini; Roger Endrigo Carvalho Porto; Sergio Bampi; Ivan Saraiva Silva (DSD, 2005)

High throughput architecture for H.264/AVC forward transforms block. - Luciano Volcan Agostini; Roger Endrigo Carvalho Porto; Sergio Bampi; Leandro Rosa; José Luís Güntzel; Ivan Saraiva Silva (ACM Great Lakes Symposium on VLSI, 2006)

High Throughput Architecture of JPEG Compressor for Color Images Targeting FPGAs. - Luciano Volcan Agostini; Sergio Bampi; Ivan Saraiva Silva (ICECS, 2006)

High throughput multitransform and multiparallelism IP for H.264/AVC video compression standard. - Luciano Volcan Agostini; Roger Endrigo Carvalho Porto; José Luís Güntzel; Ivan Saraiva Silva; Sergio Bampi (ISCAS, 2006)

Implementation of a HDTV transport stream multiplexer based on ITU-T H.222.0 recommendation. - Gustavo Girão; Sílvio R. F. de Araújo; Monica Magalhães Pereira; Ivan Saraiva Silva (WebMedia, 2006)

Cache coherency communication cost in a NoC-based MPSoC platform. - Gustavo Girão; Bruno Cruz de Oliveira; Rodrigo Soares; Ivan Saraiva Silva (SBCCI, 2007)

RoSA: a reconfigurable stream-based architecture. - Monica Magalhães Pereira; Bruno Cruz de Oliveira; Ivan Saraiva Silva (SBCCI, 2007)

Multiplierless and fully pipelined JPEG compression soft IP targeting FPGAs. - Luciano Volcan Agostini; Ivan Saraiva Silva; Sergio Bampi (Microprocess. Microsystems, 2007)

Using traditional loop unrolling to fit application on a new hybrid reconfigurable architecture. - Monica Magalhães Pereira; Sílvio R. F. de Araújo; Bruno Cruz de Oliveira; Ivan Saraiva Silva (SAC, 2008)

Using NoC routers as processing elements. - Sílvio R. F. de Fernandes; Bruno Cruz de Oliveira; Ivan Saraiva Silva (SBCCI, 2009)

Processing while routing: a network-on-chipbased parallel system. - Sílvio R. F. de Fernandes; Bruno Cruz de Oliveira; M. Costa; Ivan Saraiva Silva (IET Comput. Digit. Tech., 2009)

Exploring memory organization in virtual MP-SoC platforms. - Bruno Cruz de Oliveira; Márcio Eduardo Kreutz; Edgard de Faria Corrêa; Ivan Saraiva Silva (SBCCI, 2010)

ZONA - An adaptable NoC-based multiprocessor addressed to education on system-on-chip design. - Ivan Saraiva Silva; Sílvio R. F. de Fernandes; Leonardo Augusto Casillo (MSE, 2011)

An efficient memory hierarchy for full search motion estimation on high definition digital videos. - Alba Sandyra Bezerra Lopes; Ivan Saraiva Silva; Luciano Volcan Agostini (SBCCI, 2011)

DDR SDRAM Memory Controller for Digital TV Decoders. - Hadley M. Siqueira; Ivan Saraiva Silva; Márcio Eduardo Kreutz; Edgard de Faria Corrêa (SBESC, 2011)

uVMP: Virtualizable multi-core platform. - Ivan Saraiva Silva; Ramon Nepomuceno; Tackyss Mafuta; Eeugenio S. Carvalho (CLEI, 2012)

A Methodology to Adapt Data Path Architectures to a MIPS-1 Model. - Leonardo Augusto Casillo; Ivan Saraiva Silva (SBESC, 2012)

Operating System Support for IPNoSys. - Sílvio R. F. de Araújo; Ivan Saraiva Silva (CLEI Electron. J., 2012)

A Memory Hierarchy Model Based on Data Reuse for Full-Search Motion Estimation on High-Definition Digital Videos. - Alba Sandyra Bezerra Lopes; Ivan Saraiva Silva; Luciano Volcan Agostini (Int. J. Reconfigurable Comput., 2012)

Scratchpad memory management using data-prefetching. - Ivan Saraiva Silva; Hildebrando Segundo (CLEI, 2015)

IPNoSys II: A New Architecture for IPNoSys Programming Model. - Thiago R. B. S. Soares; Ivan Saraiva Silva; Sílvio R. F. de Fernandes (SBCCI, 2015)

An OpenCL-Compliant Multi-core Platform and Its Companion Compiler. - Ramon S. Nepomuceno; Jonatas C. Santos; Laysson O. Luz; Ivan Saraiva Silva (SBESC, 2015)

Proposal and validation of an adaptable array for multi-core processors. - Francisco Carlos Silva Junior; Ivan Saraiva Silva (CLEI, 2016)

Automatic labelling of clusters with discrete and continuous data using supervised machine learning. - Joselito Mendes de Sousa; Roney Lira de Sales Santos; Lucas Araujo Lopes; Vinícius Ponte Machado; Ivan Saraiva Silva (SCCC, 2016)

A Method for Voltage Sag Source Location Using Clustering Algorithm and Decision Rule Labeling. - José Carlos C. L. da Silva Filho; Fábbio Anderson Silva Borges; Ricardo de Andrade Lira Rabelo; Ivan Saraiva Silva (IJCNN, 2019)

Design Space Exploration of a Reconfigurable Accelerator in a Heterogeneous Multicore. - Francisco Carlos Silva; João P. dos S. Patrocinio; Ivan Saraiva Silva; Ricardo Pezzuol Jacobi (SBCCI, 2020)

A Redundant Approach to Increase Reliability of Data Cache Memories. - Francisco Carlos Silva; Ivan Saraiva Silva (CLEI, 2021)

Analyzing Speech Data to Detect Work Environment in Group Activities. - Valeria Barzola; Eddo Alvarado; Carlos Loja; Alex Velez; Ivan Saraiva Silva; Vanessa Echeverría (AIED (2), 2022)

Evaluating a Machine Learning-based Approach for Cache Configuration. - Lucas Ribeiro; Ricardo P. Jacobi; Francisco Júnior; Jones Yudi Mori Alves da Silva; Ivan Saraiva Silva (LASCAS, 2022)

X4-RARE: Revisiting the X4CP32 Coarse-Grained Reconfigurable Architecture Model. - Ivan Saraiva Silva; Francisco Carlos Silva Junior (ISVLSI, 2023)