DIALOG: An Expert Debugging System for MOSVLSI Design. - Hugo De Man; Ivo Bolsens; E. Vanden Meersch; Johan Van Cleynenbreugel (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985)

Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour. - Ivo Bolsens; W. De Rammelaere; Luc J. M. Claesen; Hugo De Man (DAC, 1989)

Derivation of signal flow direction in MOS VLSI: an alternative. - W. De Rammelaere; Ivo Bolsens; Luc J. M. Claesen; Hugo De Man (ICCD, 1990)

Compiling Multi-Dimensional Data Streams into Distributed DSP ASIC Memory. - Jan Vanhoof; Ivo Bolsens; Hugo De Man (ICCAD, 1991)

Just in Time Scheduling. - Karl van Rompaey; Ivo Bolsens; Hugo De Man (ICCD, 1992)

Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks. - Evagelos Katsadas; Zohair Sahraoui; Maryse Wouters; Veerle Derudder; Ivo Bolsens; Paul Six; Hugo De Man (Synthesis for Control Dominated Circuits, 1992)

High-level synthesis for real-time digital signal processing. - Jan Vanhoof; Karl van Rompaey; Ivo Bolsens; Gert Goossens; Hugo De Man (Kluwer, 1993)

SMILE: A scalable microcontroller library element. - A. K. Betts; Ivo Bolsens; Etienne Sicard; Marc Renaudin; Adrian Johnstone (Microprocess. Microprogramming, 1993)

ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon Codec. - Koen Van Nieuwenhove; Kjell Cools; D. Devisch; Ivo Bolsens; Serge Vernalde; Kim Chansik; R. B. W. Lee; Oh Younguk (EURO-DAC, 1994)

Design of heterogeneous ICs for mobile and personal communication systems. - Gert Goossens; Ivo Bolsens; Bill Lin 001; Francky Catthoor (ICCAD, 1994)

Search space reduction through clustering in test generation. - Zohair Sahraoui; Paul Six; Ivo Bolsens; Hugo De Man (EURO-DAC, 1995)

Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. - Elisabeth Berrebi; Polen Kission; Serge Vernalde; S. De Troch; Jean-Claude Herluison; Jean Fréhel; Ahmed Amine Jerraya; Ivo Bolsens (DAC, 1996)

CoWare - a design environment for heterogenous hardware/software systems. - Karl van Rompaey; Ivo Bolsens; Hugo De Man; Diederik Verkest (EURO-DAC, 1996)

A Hilbert fractal codec for region oriented compression of color images. - Jan Bormans; Serge Vernalde; Jan Cornelis 001; Ivo Bolsens; Hugo De Man (ICECS, 1996)

Designing Systems On Silicon: A Digital Spread Spectrum Pager. - S. Samel; Bert Gyselinckx; Ivo Bolsens; Hugo De Man (VLSI Design, 1996)

CoWare - A design environment for heterogeneous hardware/software systems. - Diederik Verkest; Karl van Rompaey; Ivo Bolsens; Hugo De Man (Des. Autom. Embed. Syst., 1996)

Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. - Patrick Schaumont; Serge Vernalde; Luc Rijnders; Marc Engels; Ivo Bolsens (ED&TC, 1997)

IP-based business conflicts. - Ivo Bolsens; Marco Cecchini (IEEE Des. Test Comput., 1997)

Hardware/software co-design of digital telecommunication systems. - Ivo Bolsens; Hugo J. De Man; Bill Lin 001; Karl van Rompaey; Steven Vercauteren; Diederik Verkest (Proc. IEEE, 1997)

Synthesis of pipelined DSP accelerators with dynamic scheduling. - Patrick Schaumont; Bart Vanthournout; Ivo Bolsens; Hugo De Man (IEEE Trans. Very Large Scale Integr. Syst., 1997)

A Programming Environment for the Design of Complex High Speed ASICs. - Patrick Schaumont; Serge Vernalde; Luc Rijnders; Marc Engels; Ivo Bolsens (DAC, 1998)

A Technique for Combined Virtual Prototyping and Hardware Design. - Patrick Schaumont; Geert Vanmeerbeeck; E. Watzeels; Serge Vernalde; Marc Engels; Ivo Bolsens (International Workshop on Rapid System Prototyping, 1998)

Low Power Digital Frequency Conversion Architectures. - Patrick Schaumont; Serge Vernalde; Marc Engels; Ivo Bolsens (J. VLSI Signal Process., 1998)

A scalable architecture for MPEG-4 embedded zero tree coding. - Bart Vanhoof; Mercedes Peón; Gauthier Lafruit; Jan Bormans; Marc Engels; Ivo Bolsens (CICC, 1999)

Implementation of a Scalable MPEG-4 Wavelet-Based Visual Texture Compression System. - Lode Nachtergaele; Bart Vanhoof; Mercedes Peón; Gauthier Lafruit; Jan Bormans; Ivo Bolsens (DAC, 1999)

Hardware Reuse at the Behavioral Level. - Patrick Schaumont; Radim Cmar; Serge Vernalde; Marc Engels; Ivo Bolsens (DAC, 1999)

Single Chip or Hybrid System Integration. - Ivo Bolsens; Wojtek Maly; Ludo Deferm; Jo Borel; Harry J. M. Veendrick (DATE, 1999)

A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. - Radim Cmar; Luc Rijnders; Patrick Schaumont; Serge Vernalde; Ivo Bolsens (DATE, 1999)

A Single-Package Solution for Wireless Transceivers. - Piet Wambacq; Stéphane Donnay; Hocine Ziad; Marc Engels; Hugo De Man; Ivo Bolsens (DATE, 1999)

BANDIT: embedding analog-to-digital converters on digital telecom ASICs. - Stéphane Donnay; Marc van Heijningen; Mustafa Badaroglu; Wim Diels; Marc Engels; Ivo Bolsens; Yann A. Zinzius; Georges G. E. Gielen; Willy Sansen; Tony Fondén; Svante Signell (ICECS, 1999)

High-level simulation and power modelling of mixed-signal front-ends for digital telecommunications. - Piet Wambacq; Gerd Vandersteen; Stéphane Donnay; Marc Engels; Ivo Bolsens; Erik Lauwers; Piet Vanassche; Georges G. E. Gielen (ICECS, 1999)

Implementation driven selection of wavelet filters for still image coding based on bitrange expansion. - Bart Masschelein; Bart Vanhoof; Lode Nachtergaele; Jan Bormans; Ivo Bolsens (MMSP, 1999)

Optimal memory organization for scalable texture codecs in MPEG-4. - Gauthier Lafruit; Lode Nachtergaele; Jan Bormans; Marc Engels; Ivo Bolsens (IEEE Trans. Circuits Syst. Video Technol., 1999)

A Scalable Architecture for MPEG-4 Wavelet Quantization. - Bart Vanhoof; Mercedes Peón; Gauthier Lafruit; Jan Bormans; Lode Nachtergaele; Ivo Bolsens (J. VLSI Signal Process., 1999)

High-level simulation of substrate noise generation including power supply noise coupling. - Marc van Heijningen; Mustafa Badaroglu; Stéphane Donnay; Marc Engels; Ivo Bolsens (DAC, 2000)

A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers. - Gerd Vandersteen; Piet Wambacq; Yves Rolain; Petr Dobrovolný; Stéphane Donnay; Marc Engels; Ivo Bolsens (DAC, 2000)

Compact Modeling of Nonlinear Distortion in Analog Communication Circuits. - Piet Wambacq; Petr Dobrovolný; Stéphane Donnay; Marc Engels; Ivo Bolsens (DATE, 2000)

Cost-Efficient C-Level Design of an MPEG-4 Video Decoder. - Kristof Denolf; Peter Vos; Jan Bormans; Ivo Bolsens (PATMOS, 2000)

Analysis and experimental verification of digital substrate noise generation for epi-type substrates. - Marc van Heijningen; John Compiet; Piet Wambacq; Stéphane Donnay; Marc Engels; Ivo Bolsens (IEEE J. Solid State Circuits, 2000)

Chip-package codesign of a low-power 5-GHz RF front end. - Stéphane Donnay; Philip Pieters; Kristof Vaesen; Wim Diels; Piet Wambacq; Walter De Raedt; Eric Beyne; Marc Engels; Ivo Bolsens (Proc. IEEE, 2000)

Hardware/software partitioning of embedded system in OCAPI-xl. - Geert Vanmeerbeeck; Patrick Schaumont; Serge Vernalde; Marc Engels; Ivo Bolsens (CODES, 2001)

High-level simulation of substrate noise generation from large digital circuits with multiple supplies. - Mustafa Badaroglu; Marc van Heijningen; Vincent Gravot; Stéphane Donnay; Hugo De Man; Georges G. E. Gielen; Marc Engels; Ivo Bolsens (DATE, 2001)

Efficient bit-error-rate estimation of multicarrier transceivers. - Gerd Vandersteen; Piet Wambacq; Yves Rolain; Johan Schoukens; Stéphane Donnay; Marc Engels; Ivo Bolsens (DATE, 2001)

80-Mb/s QPSK and 72-Mb/s 64-QAM flexible and scalable digital OFDM transceiver ASICs for wireless local area networks in the 5-GHz band. - Wolfgang Eberle; Veerle Derudder; Geert Vanwijnsberghe; Mario Vergara; Luc Deneire; Liesbet Van der Perre; Marc Engels; Ivo Bolsens; Hugo De Man (IEEE J. Solid State Circuits, 2001)

Power and Speed-Efficient Code Transformation of Video Compression Algorithms for RISC Processors. - Lode Nachtergaele; Toon Gijbels; Jan Bormans; Francky Catthoor; Ivo Bolsens (J. VLSI Signal Process., 2001)

Design Technology for Networked Reconfigurable FPGA Platforms. - Steve Guccione; Diederik Verkest; Ivo Bolsens (DATE, 2002)

Reconfigurable SoC - What Will it Look Like? - J. Bryan Lewis; Ivo Bolsens; Rudy Lauwereins; Chris Wheddon; Bhusan Gupta; Yankin Tanurhan (DATE, 2002)

Challenges and Opportunities for FPGA Platforms. - Ivo Bolsens (FPL, 2002)

Fast, cheap and under control: the next implementation fabric. - Abbas El Gamal; Ivo Bolsens; Andy Broom; Christopher Hamlin; Philippe Magarshack; Zvi Or-Bach; Lawrence T. Pileggi (DAC, 2003)

Panel Title: Reconfigurable Computing - Different Perspectives. - Wolfgang Rosenstiel; Rudy Lauwereins; Ivo Bolsens; Chris Rowen; Yankin Tanurhan; Kees A. Vissers; S. Wang (DATE, 2003)

Challenges and Opportunities for FPGA Programmable System Platforms. - Ivo Bolsens (IOLTS, 2003)

A scalable MPEG-4 wavelet-based visual texture compression system with optimized memory organization. - Bart Vanhoof; Lode Nachtergaele; Gauthier Lafruit; Mercedes Peón; Bart Masschelein; Francky Catthoor; Jan Bormans; Ivo Bolsens (IEEE Trans. Circuits Syst. Video Technol., 2003)

What happened to ASIC?: Go (recon)figure? - Nitin Deo; Behrooz Zahiri; Ivo Bolsens; Jason Cong; Bhusan Gupta; Philip Lopresti; Christopher B. Reynolds; Chris Rowen; Ray Simar (DAC, 2004)

Are we ready for system-level synthesis? - Jason Cong; Tony Ma; Ivo Bolsens; Phil Moorby; Jan M. Rabaey; John Sanguinetti; Kazutoshi Wakabayashi; Yoshi Watanabe (ASP-DAC, 2005)

Plenary lecture [Second page is blank]. - Ivo Bolsens (ECCTD, 2005)

FPGA: The future platform for transforming, transporting and computing data. - Ivo Bolsens (FPL, 2008)

NoCs: It is about the memory and the programming model. - Ivo Bolsens (NOCS, 2009)

FPGA platforms leading the way in the application of 'more than Moore's' technology. - Ivo Bolsens (FPT, 2010)

Programming customized parallel architectures in FPGA. - Ivo Bolsens (IPDPS Workshops, 2010)

"All Programmable SOC FPGA for networking and computing in big data infrastructure". - Ivo Bolsens; Georges G. E. Gielen; Kaushik Roy 001; Ulf Schneider (ASP-DAC, 2014)

"All programmable FPGA, providing hardware efficiency to software programmers". - Ivo Bolsens (FPL, 2017)

Pushing the boundaries of Moore's Law to transition from FPGA to All Programmable Platform. - Ivo Bolsens (ISPD, 2017)

Scalable System and Silicon Architectures to Handle the Workloads of the Post-Moore Era. - Ivo Bolsens (ISPD, 2020)

Bridging Divides: Unifying AI Architectures from from Edge to Cloud. - Ivo Bolsens (MLCAD, 2023)