Data Recovery and Retiming for the Fully Buffered DIMM 4.8Gb/s Serial Links. - Hamid Partovi; Wolfgang Walthes; Luca Ravezzi; Paul Lindt; Sivaraman Chokkalingam; Karthik Gopalakrishnan; Andreas Blum; Otto Schumacher; Claudio Andreotti; Michael Bruennert; Bruno Celli-Urbani; Dirk Friebe; et al. (ISSCC, 2006)

FPGA Architecture for RF Transceiver System and Mixed-Signal Low Cost Tests. - Ivo Koren; Frank Demmerle; Roland May; Martin Kaibel; Sebastian Sattler (ETS, 2007)

Multi-site test of RF transceivers on low-cost digital ATE. - Ivo Koren; Ben Schuffenhauer; Frank Demmerle; Frank Neugebauer; Gert Pfahl; Dirk Rautmann (ITC, 2011)