Power/Area Analysis of a FPGA-Based Open-Source Processor using Partial Dynamic Reconfiguration. - Izhar Zaidi; Atukem Nabina; Cedric Nishan Canagarajah; José L. Núñez-Yáñez (DSD, 2008)

Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor. - Izhar Zaidi; Atukem Nabina; Cedric Nishan Canagarajah; José L. Núñez-Yáñez (FPL, 2008)

Energy optimization in a Network-on-Chip with dynamically reconfigurable processing nodes. - José L. Núñez-Yáñez; Mohammad Hosseinabady; Atukem Nabina; Izhar Zaidi (CCA/ISIC, 2009)