NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFE to Break Great Memory Wall with 10 ns of PGM-pulse, 1010 Cycles of Endurance, and Decade Lifetime at 103 °C. - E. R. Hsieh; J. K. Chang; T. Y. Tang; Y. J. Li; C. W. Liang; M. Y. Lin; S. Y. Huang; C. J. Su; J. C. Guo; Steve S. Chung (VLSI Technology and Circuits, 2022)

A World First QLC RRAM: Highly Reliable Resistive-Gate Flash with Record 108 Endurance and Excellent Retention. - M. Y. Li; J. P. Lee; C. H. Liu; J. C. Guo; Steve S. Chung (IRPS, 2023)

An Ultra-Low Voltage Auger-Recombination Enhanced Hot Hole Injection Scheme in Implementing a 3 Bits per Cell e-DRAM CIM Macro for Inference Accelerator. - T. C. Kao; M. J. Huang; Y. R. Liu; Y. K. Wang; J. C. Guo; Steve S. Chung (VLSI Technology and Circuits, 2024)

Resistive-Gate RAM: An 1TnR Architecture Feasible for Scaling Beyond 16nm CMOS Generation. - C. H. Sung; M. J. Huang; Y. J. Li; Y. T. Yang; Y. R. Liu; P. H. Shih; J. C. Guo; Steve S. Chung (IRPS, 2025)