The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization. - J. Gregory Steffan; Todd C. Mowry (HPCA, 1998)

A scalable approach to thread-level speculation. - J. Gregory Steffan; Christopher B. Colohan; Antonia Zhai; Todd C. Mowry (ISCA, 2000)

Compiler optimization of scalar value communication between speculative threads. - Antonia Zhai; Christopher B. Colohan; J. Gregory Steffan; Todd C. Mowry (ASPLOS, 2002)

Improving Value Communication for Thread-Level Speculation. - J. Gregory Steffan; Christopher B. Colohan; Antonia Zhai; Todd C. Mowry (HPCA, 2002)

Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads. - Antonia Zhai; Christopher B. Colohan; J. Gregory Steffan; Todd C. Mowry (CGO, 2004)

The microarchitecture of FPGA-based soft processors. - Peter Yiannacouras; Jonathan Rose; J. Gregory Steffan (CASES, 2005)

Optimistic Intra-Transaction Parallelism on Chip Multiprocessors. - Christopher B. Colohan; Anastassia Ailamaki; J. Gregory Steffan; Todd C. Mowry (VLDB, 2005)

The STAMPede approach to thread-level speculation. - J. Gregory Steffan; Christopher B. Colohan; Antonia Zhai; Todd C. Mowry (ACM Trans. Comput. Syst., 2005)

A probabilistic pointer analysis for speculative optimizations. - Jeff Da Silva; J. Gregory Steffan (ASPLOS, 2006)

Application-specific customization of soft processor microarchitecture. - Peter Yiannacouras; J. Gregory Steffan; Jonathan Rose (FPGA, 2006)

Improving cache locality for thread-level speculation. - Stanley L. C. Fung; J. Gregory Steffan (IPDPS, 2006)

Tolerating Dependences Between Large Speculative Threads Via Sub-Threads. - Christopher B. Colohan; Anastassia Ailamaki; J. Gregory Steffan; Todd C. Mowry (ISCA, 2006)

JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory. - Marek Olszewski; Jeremy Cutler; J. Gregory Steffan (PACT, 2007)

Improving Pipelined Soft Processors with Multithreading. - Martin Labrecque; J. Gregory Steffan (FPL, 2007)

Custom code generation for soft processors. - Martin Labrecque; Peter Yiannacouras; J. Gregory Steffan (SIGARCH Comput. Archit. News, 2007)

Exploration and Customization of FPGA-Based Soft Processors. - Peter Yiannacouras; J. Gregory Steffan; Jonathan Rose (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

CMP Support for Large and Dependent Speculative Threads. - Christopher B. Colohan; Anastassia Ailamaki; J. Gregory Steffan; Todd C. Mowry (IEEE Trans. Parallel Distributed Syst., 2007)

The potential for variable-granularity access tracking for optimistic parallelism. - Mihai Burcea; J. Gregory Steffan; Cristiana Amza (MSPC, 2008)

VESPA: portable, scalable, and flexible FPGA-based vector processors. - Peter Yiannacouras; J. Gregory Steffan; Jonathan Rose (CASES, 2008)

Scaling Soft Processor Systems. - Martin Labrecque; Peter Yiannacouras; J. Gregory Steffan (FCCM, 2008)

Compiler and hardware support for reducing the synchronization of speculative threads. - Antonia Zhai; J. Gregory Steffan; Christopher B. Colohan; Todd C. Mowry (ACM Trans. Archit. Code Optim., 2008)

Incrementally parallelizing database transactions with thread-level speculation. - Christopher B. Colohan; Anastassia Ailamaki; J. Gregory Steffan; Todd C. Mowry (ACM Trans. Comput. Syst., 2008)

Fine-grain performance scaling of soft vector processors. - Peter Yiannacouras; J. Gregory Steffan; Jonathan Rose (CASES, 2009)

Soft vector processors vs FPGA custom hardware: measuring and reducing the gap. - Peter Yiannacouras; J. Gregory Steffan; Jonathan Rose (FPGA, 2009)

Fast critical sections via thread scheduling for FPGA-based multithreaded processors. - Martin Labrecque; J. Gregory Steffan (FPL, 2009)

Data parallel FPGA workloads: Software versus hardware. - Peter Yiannacouras; J. Gregory Steffan; Jonathan Rose (FPL, 2009)

The case for hardware transactional memory in software packet processing. - Martin Labrecque; J. Gregory Steffan (ANCS, 2010)

Application-Specific Signatures for Transactional Memory in Soft Processors. - Martin Labrecque; Mark C. Jeffrey; J. Gregory Steffan (ARC, 2010)

9th Workshop on Compiler-Driven Performance. - Clark Verbrugge; J. Gregory Steffan; Mark G. Stoodley; Kit Barton; Ondrej Lhoták (CASCON, 2010)

Efficient multi-ported memories for FPGAs. - Charles Eric LaForest; J. Gregory Steffan (FPGA, 2010)

Parallelizing FPGA placement using Transactional Memory. - Steven Birk; J. Gregory Steffan; Jason Helge Anderson (FPT, 2010)

A GPU-inspired soft processor for high-throughput acceleration. - Jeffrey Kingyens; J. Gregory Steffan (IPDPS Workshops, 2010)

Caliper: a tool to generate precise and closed-loop traffic. - Monia Ghobadi; Martin Labrecque; Geoffrey Salmon; Kaveh Aasaraai; Soheil Hassas Yeganeh; Yashar Ganjali; J. Gregory Steffan (SIGCOMM, 2010)

Programmer-assisted automatic parallelization. - Diego Huang; J. Gregory Steffan (CASCON, 2011)

NetTM: faster and easier synchronization for soft multicores via transactional memory. - Martin Labrecque; J. Gregory Steffan (FPGA, 2011)

DART: A programmable architecture for NoC simulation on FPGAs. - Danyao Wang; Natalie D. Enright Jerger; J. Gregory Steffan (NOCS, 2011)

Understanding bloom filter intersection for lazy address-set disambiguation. - Mark C. Jeffrey; J. Gregory Steffan (SPAA, 2011)

The Potential for a GPU-Like Overlay Architecture for FPGAs. - Jeffrey Kingyens; J. Gregory Steffan (Int. J. Reconfigurable Comput., 2011)

11th Compiler-Driven Performance Workshop. - Ondrej Lhoták; José Nelson Amaral; Kit Barton; Martin Hirzel; J. Gregory Steffan (CASCON, 2012)

Compiler Support for Fine-Grain Software-Only Checkpointing. - Chuck (Chengyan) Zhao; J. Gregory Steffan; Cristiana Amza; Allan Kielstra (CC, 2012)

Multi-ported memories for FPGAs via XOR. - Charles Eric LaForest; Ming G. Liu; Emma Rae Rapati; J. Gregory Steffan (FPGA, 2012)

OCTAVO: an FPGA-centric processor family. - Charles Eric LaForest; John Gregory Steffan (FPGA, 2012)

Caliper: Precise and Responsive Traffic Generator. - Monia Ghobadi; Geoffrey Salmon; Yashar Ganjali; Martin Labrecque; J. Gregory Steffan (Hot Interconnects, 2012)

Portable, Flexible, and Scalable Soft Vector Processors. - Peter Yiannacouras; J. Gregory Steffan; Jonathan Rose (IEEE Trans. Very Large Scale Integr. Syst., 2012)

A Multithreaded VLIW Soft Processor Family. - Kalin Ovtcharov; Ilian Tili; J. Gregory Steffan (FCCM, 2013)

NetThreads-10G: Software packet processing on NetFPGA-10G in a virtualized networking environment demonstration abstract. - Stuart Byma; J. Gregory Steffan; Paul Chow (FPL, 2013)

TILT: A multithreaded VLIW soft processor family. - Kalin Ovtcharov; Ilian Tili; J. Gregory Steffan (FPL, 2013)

Maximizing speed and density of tiled FPGA overlays via partitioning. - Charles Eric LaForest; J. Gregory Steffan (FPT, 2013)

Speeding Up FPGA Placement: Parallel Algorithms and Methods. - Matthew An; J. Gregory Steffan; Vaughn Betz (FCCM, 2014)

FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack. - Stuart Byma; J. Gregory Steffan; Hadi Bannazadeh; Alberto Leon-Garcia; Paul Chow (FCCM, 2014)

Producing high-quality real-time HDR video system with FPGA (abstract only). - Tao Ai; Mir Adnan Ali; J. Gregory Steffan; Kalin Ovtcharov; Sarmad Zulfiqar; Steve Mann 001 (FPGA, 2014)

Approaching overhead-free execution on FPGA soft-processors. - Charles Eric LaForest; Jason Helge Anderson; J. Gregory Steffan (FPT, 2014)

Comparing performance, productivity and scalability of the TILT overlay processor to OpenCL HLS. - Rafat Rashid; J. Gregory Steffan; Vaughn Betz (FPT, 2014)

Virtualized Reconfigurable Hardware Resources in the SAVI Testbed. - Stuart Byma; Hadi Bannazadeh; Alberto Leon-Garcia; J. Gregory Steffan; Paul Chow (TRIDENTCOM, 2014)

DART: A Programmable Architecture for NoC Simulation on FPGAs. - Danyao Wang; Charles Lo; Jasmina Vasiljevic; Natalie D. Enright Jerger; J. Gregory Steffan (IEEE Trans. Computers, 2014)

Composing Multi-Ported Memories on FPGAs. - Charles Eric LaForest; Zimo Li; Tristan O'rourke; Ming G. Liu; J. Gregory Steffan (ACM Trans. Reconfigurable Technol. Syst., 2014)

Reducing the Performance Gap between Soft Scalar CPUs and Custom Hardware with TILT. - Ilian Tili; Kalin Ovtcharov; J. Gregory Steffan (ACM Trans. Reconfigurable Technol. Syst., 2017)