Mixed arithmetic architecture: a solution to the iteration bound for resource efficient FPGA and CPLD recursive digital filters. - J. Living; Bashir M. Al-Hashimi (ISCAS (1), 1999)

New differential coefficient coding algorithm for recursive FIR filters. - J. Living; Bashir M. Al-Hashimi (ISCAS (3), 1999)

Efficient Recursive Digital Filters using Combined Look-Ahead Denominator Distribution and Numerator Decomposition. - J. Living; M. Moniri; S. B. Tennakoon (J. VLSI Signal Process., 2001)