Logic Synthesis and Verification of the CPU and Caches of a Mainframe System. - Huy Nam Nguyen; J. P. Tual; L. Ducousso; Michel Thill; P. Vallet (EDAC-ETC-EUROASIC, 1994)

The Structured Logic CAD Suite Used on the DPS7000 System. - Huy Nam Nguyen; J. P. Tual; L. Ducousso; Michel Thill; P. Vallet (ICCD, 1994)

Auriga2: a 4.7 million-transistor CISC microprocessor. - J. P. Tual; Michel Thill; C. Bernard; Huy Nam Nguyen; F. Mottini; M. Moreau; P. Vallet (ASP-DAC, 1995)

High Security Smartcards. - Marc Renaudin; G. Fraidy Bouesse; Ph. Proust; J. P. Tual; Laurent Sourgen; Fabien Germain (DATE, 2004)