A Note on the Iterative Decomposition of Finite Automata - J. Robert Jump (Inf. Control., 1969)

R70-29 Uniform Synthesis of Sequential Circuits. - J. Robert Jump (IEEE Trans. Computers, 1970)

On the Length of Feedback Shift Registers - J. Robert Jump; Shreehari Marathe (Inf. Control., 1971)

Microprogrammed Arrays. - J. Robert Jump; Dennis R. Fritsche (IEEE Trans. Computers, 1972)

On the Equivalence of Asynchronous Control Structures. - J. Robert Jump; P. S. Thiagarajan (SIAM J. Comput., 1973)

Asynchronous Control Arrays. - J. Robert Jump (IEEE Trans. Computers, 1974)

On the Interconnection Structure of Cellular Networks - J. Robert Jump; Jayang S. Kirtane (Inf. Control., 1974)

On the Interconnection of Asynchronous Control Structures. - J. Robert Jump; P. S. Thiagarajan (J. ACM, 1975)

A Modular Memory Scheme for Array Processing. - S. R. Ahuja; J. Robert Jump (ISCA, 1977)

Effective Pipelining of Digital Systems. - J. Robert Jump; Sudhir Ahuja (IEEE Trans. Computers, 1978)

Top-Down Design in the Context of Parallel Programs - N. D. Jotwani; J. Robert Jump (Inf. Control., 1979)

On Functional Equivalences in a Model for Parallel Computation - Susan E. Conry; J. Robert Jump (Inf. Control., 1979)

Packet Switching Interconnection Networks for Modular Systems. - Daniel M. Dias; J. Robert Jump (Computer, 1981)

Analysis and Simulation of Buffered Delta Networks. - Daniel M. Dias; J. Robert Jump (IEEE Trans. Computers, 1981)

Augmented and pruned n log n multistaged networks: topology and performance. - Daniel M. Dias; J. Robert Jump (ICPP, 1982)

Generalized Delta Networks. - Manoj Kumar; J. Robert Jump (ICPP, 1983)

Switching Strategies in a Class of Packet Switching Networks - Manoj Kumar; Daniel M. Dias; J. Robert Jump (ISCA, 1983)

An interleaved array-processing architecture. - J. Robert Jump; James D. Wise; David T. Harper III (AFIPS National Computer Conference, 1984)

Performance enhancement in buffered delta networks using crossbar switches and multiple links. - Manoj Kumar; J. Robert Jump (J. Parallel Distributed Comput., 1984)

Matrix Multiplication in an Interleaved Array Processing Architecture. - G. Wolf; J. Robert Jump (ISCA, 1985)

Switching Strategies in Shuffle-Exchange Packet-Switched Networks. - Manoj Kumar; Daniel M. Dias; J. Robert Jump (IEEE Trans. Computers, 1985)

Performance Evaluation of Vector Accesses in Parallel Memories Using a Skewed Storage Scheme. - David T. Harper III; J. Robert Jump (ISCA, 1986)

Performance of Unbuffered Shuffle-Exchange Networks. - Manoj Kumar; J. Robert Jump (IEEE Trans. Computers, 1986)

Performance Evaluation of Reduced Bandwidth Multistage Interconnection Networks. - David T. Harper III; J. Robert Jump (ISCA, 1987)

Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme. - David T. Harper III; J. Robert Jump (IEEE Trans. Computers, 1987)

The Rice Parallel Processing Testbed. - Richard Covington; Sridhar Madala; V. Mehta; J. Robert Jump; James B. Sinclair (SIGMETRICS, 1988)

Cross-profiling as an efficient technique in simulating parallel computer systems. - Richard Covington; J. Robert Jump; James B. Sinclair (COMPSAC, 1989)

Efficient simulation of cache memories. - Sandhya Dwarkadas; J. Robert Jump; James B. Sinclair (WSC, 1989)

Efficient Simulation of Multiprogramming. - W. P. Dawkins; V. Debbad; J. Robert Jump; James B. Sinclair (SIGMETRICS, 1990)

Evaluation of Reduced Bandwidth Multistage Networks. - David T. Harper III; J. Robert Jump (J. Parallel Distributed Comput., 1990)

Efficient Simulation of Parallel Computer Systems. - Richard Covington; Sandhya Dwarkadas; J. Robert Jump; James B. Sinclair; Sridhar Madala (Int. J. Comput. Simul., 1991)

Execution-Driven Simulation of Shared-Memory Multiprocessors. - Sandhya Dwarkadas; J. Robert Jump; R. Mukherjee; James B. Sinclair (MASCOTS, 1993)

NETSIM: A General-Purpose Interconnection Network Simulator. - J. Robert Jump; Sridhar Lakshmanamurthy (MASCOTS, 1993)

Execution-Driven Simulation of a Superscalar Processor. - H. A. Rizvi; James B. Sinclair; J. Robert Jump; J. Carson (HICSS (1), 1994)

Execution-Driven Simulation of Multiprocessors: Address and Timing Analysis. - Sandhya Dwarkadas; J. Robert Jump; James B. Sinclair (ACM Trans. Model. Comput. Simul., 1994)