Augusto Vega

Orcid: 0000-0001-6521-7137

According to our database1, Augusto Vega authored at least 29 papers between 2010 and 2022.

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Bibliography

2022
HetSched: Quality-of-Mission Aware Scheduling for Autonomous Vehicle SoCs.
CoRR, 2022

Cloud-backed mobile cognition.
Computing, 2022

2021
Hardware Specialization: From Cell to Heterogeneous Microprocessors Everywhere.
IEEE Micro, 2021

Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles.
IEEE Comput. Archit. Lett., 2021

2020
STOMP: A Tool for Evaluation of Scheduling Policies in Heterogeneous Multi-Processors.
CoRR, 2020

2018
Towards "Smarter" Vehicles Through Cloud-Backed Swarm Cognition.
Proceedings of the 2018 IEEE Intelligent Vehicles Symposium, 2018

Performance Characterization of State-Of-The-Art Deep Learning Workloads on an IBM "Minsky" Platform.
Proceedings of the 51st Hawaii International Conference on System Sciences, 2018

Energy-secure swarm power management.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Power Efficiency Analysis of a Deep Learning Workload on an IBM "Minsky" Platform.
Proceedings of the High Performance Computing - 5th Latin American Conference, 2018

2017
Mitigating Power Contention: A Scheduling Based Approach.
IEEE Comput. Archit. Lett., 2017

Invited paper: Secure swarm intelligence: A new approach to many-core power management.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017


2016
Characterization and mitigation of power contention across multiprogrammed workloads.
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016

2015
Power-efficient embedded processing with resilience and real-time constraints.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Resilient mobile cognition: Algorithms, innovations, and architectures.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Resilient, UAV-embedded real-time computing.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

2014
Special Series on Harsh Chips [Guest editors' introduction].
IEEE Micro, 2014

Guest Editorial: Robust and energy-secure systems.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014

2013
Performance and power optimizations in chip multiprocessors for throughput-aware computation.
PhD thesis, 2013

SMT Switch: Software Mechanisms for Power Shifting.
IEEE Comput. Archit. Lett., 2013

Crank it up or dial it down: coordinated multiprocessor frequency and folding control.
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

Processor architecture for software implementation of multi-sector G-RAKE receivers for HSUPA wireless infrastructure.
Proceedings of the IEEE International Conference on Acoustics, 2013

SMT-centric power-aware thread placement in chip multiprocessors.
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012
On the simulation of large-scale architectures using multiple application abstraction levels.
ACM Trans. Archit. Code Optim., 2012

Architectural perspectives of future wireless base stations based on the IBM PowerEN™ processor.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

Power management of multi-core chips: Challenges and pitfalls.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Breaking the bandwidth wall in chip multiprocessors.
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

2010
ArchExplorer for Automatic Design Space Exploration.
IEEE Micro, 2010

Comparing last-level cache designs for CMP architectures.
Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies, 2010


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