An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute Engine. - Justin M. Correll; Lu Jie 001; Seungheun Song; Seungjong Lee; Junkang Zhu; Wei Tang 010; Luke Wormald; Jack Erhardt; Nicolas Breil; Roger Quon; Deepak Kamalanathan; Siddarth A. Krishnan; et al. (VLSI Technology and Circuits, 2022)

ANSA: Adaptive Near-Sensor Architecture for Dynamic DNN Processing in Compact Form Factors. - Reid Pinkham; Jack Erhardt; Barbara De Salvo; Andrew Berkovich; Zhengya Zhang (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

SteROI-D: System Design and Mapping for Stereo Depth Inference on Regions of Interest. - Jack Erhardt; Ziang Li; Reid Pinkham; Andrew Berkovich; Zhengya Zhang (CoRR, 2025)

An 8-bit 20.7 TOPS/W Multilevel Cell ReRAM Macro With ADC-Assisted Bit-Serial Processing. - Justin M. Correll; Lu Jie 001; Seungheun Song; Seungjong Lee; Junkang Zhu; Wei Tang 010; Luke Wormald; Jack Erhardt; Nicolas Breil; Roger Quon; Deepak Kamalanathan; Siddarth A. Krishnan; et al. (IEEE J. Solid State Circuits, 2025)