Fault-tolerant array processors using N-and-half-track switches. - Jack S. N. Jean (ASAP, 1990)

A new distance measure for binary images. - Jack S. N. Jean (ICASSP, 1990)

Resolving multifont character confusion with neural networks. - Jin Wang; Jack S. N. Jean (Pattern Recognit., 1993)

Segmentation of merged characters by neural networks and shortest path. - Jin Wang; Jack S. N. Jean (Pattern Recognit., 1994)

Weight smoothing to improve network generalization. - Jack S. N. Jean; Jin Wang (IEEE Trans. Neural Networks, 1994)

Interfacing FPGA/VLSI Processor Arrays. - Joseph A. Fernando; Jack S. N. Jean (ASAP, 1995)

Concurrency Preserving Rartitioning (CPP) for Parallel Logic Simulation. - Hong K. Kim; Jack S. N. Jean (Workshop on Parallel and Distributed Simulation, 1996)

Parallel Optimistic Logic Simulation with Event Lookahead. - Hong K. Kim; Jack S. N. Jean (ICPP, 1998)

Accelerating an IR Automatic Target Recognition Application with FPGAs. - Jack S. N. Jean; Xuejun Liang; Brian Drozd; Karen A. Tomko (FCCM, 1999)

Dynamic Reconfiguration to Support Concurrent Applications. - Jack S. N. Jean; Karen A. Tomko; Vikram Yavagal; Jignesh Shah; Robert Cook (IEEE Trans. Computers, 1999)

Processor array design with FPGA area constraint. - Joseph A. Fernando; Jack S. N. Jean (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Concurrency Preserving Partitioning Algorithm for Parallel Logic Simulation. - Hong K. Kim; Jack S. N. Jean (VLSI Design, 1999)

Interface Design for the Mapping of Generalized Template Matching on Reconfigurable Systems. - Xuejun Liang; Jack S. N. Jean (PDPTA, 2000)

Automatic Target Recognition with Dynamic Reconfiguration. - Jack S. N. Jean; Xuejun Liang; Brian Drozd; Karen A. Tomko; Yan Wang (J. VLSI Signal Process., 2000)

Data Buffering and Allocation in Mapping Generalized Template Matching on Reconfigurable Systems. - Xuejun Liang; Jack S. N. Jean; Karen A. Tomko (J. Supercomput., 2001)

A Study of Mapping Generalized Sliding Window Operations on Reconfigurable Computers. - Jack S. N. Jean; Xinzhong Guo; Fei Wang 009; Lei Song; Ying Zhang (Engineering of Reconfigurable Systems and Algorithms, 2003)

Mapping of generalized template matching onto reconfigurable computers. - Xuejun Liang; Jack S. N. Jean (IEEE Trans. Very Large Scale Integr. Syst., 2003)

Design Enumeration of Mapping 2D FFT onto FPGA Based Reconfigurable Computers. - Xinzhong Guo; Jack S. N. Jean (ERSA, 2004)

Aspect Ratio Effects on Reconfigurable Computing. - Fei Wang 009; Jack S. N. Jean; Shuxia Sun (ERSA, 2005)

Architectural Support for Runtime 2D Partial Reconfiguration. - Fei Wang 009; Jack S. N. Jean (ERSA, 2006)

Parameterized AND-OR Trees for FPGA Design Space Exploration. - Srikanth Nadella; Andrew Dittes; Jack S. N. Jean (ERSA, 2010)

Architecture and operating system support for two-dimensional runtime partial reconfiguration. - Fei Wang 009; Jack S. N. Jean (J. Supercomput., 2012)