A Framework for Analyzing Parallel Discrete Event Simulation. - Jack V. Briner Jr. (Int. CMG Conference, 1988)

Taking advantage of optimal on-chip parallelism for parallel discrete-event simulation. - Jack V. Briner Jr.; John L. Ellis; Gershon Kedem (ICCAD, 1988)

Breaking the Barrier of Parallel Simulation of Digital Systems. - Jack V. Briner Jr.; John L. Ellis; Gershon Kedem (DAC, 1991)

Parallel Logic Simulation of VLSI Systems. - Mary L. Bailey; Jack V. Briner Jr.; Roger D. Chamberlain (ACM Comput. Surv., 1994)