A 27-mW 3.6-gb/s I/O transceiver. - Jackie Koon Lun Wong; Hamid Hatamkhani; Mozhgan Mansuri; Chih-Kong Ken Yang (IEEE J. Solid State Circuits, 2004)

A 5-mW 6-Gb/s Quarter-Rate Sampling Receiver With a 2-Tap DFE Using Soft Decisions. - Jackie Koon Lun Wong; Alexander V. Rylyakov; Chih-Kong Ken Yang (IEEE J. Solid State Circuits, 2007)

Edge and Data Adaptive Equalization of Serial-Link Transceivers. - Jackie Koon Lun Wong; E-Hung Chen; Chih-Kong Ken Yang (IEEE J. Solid State Circuits, 2008)

A 2.7mW/Channel 48-to-1000MHz Direct Sampling Full-Band Cable Receiver. - Jiangfeng Wu; Giuseppe Cusmai; Acer Wei-Te Chou; Tao Wang 010; Bo Shen; Vijayaramalingam Periasamy; Ming-Hung Hsieh; Chun-Ying Chen; Lin He 006; Loke Tan; Aravind Padyana; Cheng-Hsun Yang; et al. (VLSIC, 2015)

A 2.7 mW/Channel 48-1000 MHz Direct Sampling Full-Band Cable Receiver. - Jiangfeng Wu; Giuseppe Cusmai; Acer Wei-Te Chou; Tao Wang 010; Bo Shen; Vijayaramalingam Periasamy; Ming-Hung Hsieh; Chun-Ying Chen; Lin He 006; Loke Kun Tan; Aravind Padyana; Vincent Cheng-Hsun Yang; et al. (IEEE J. Solid State Circuits, 2016)

A 16b 6GS/S nyquist DAC with IMD <-90dBc up to 1.9GHz in 16nm CMOS. - Chi-Hung Lin; Jackie Koon Lun Wong; Tae-Youn Kim; Guangxi Ray Xie; Donald Major; Greg Unruh; Sunny Raj Dommaraju; Hans Eberhart; Ardie G. Venes (ISSCC, 2018)