Layer assignment for reliable system-on-package. - Jacob R. Minz; Sung Kyu Lim (ASP-DAC, 2004)

Profile-guided microarchitectural floorplanning for deep submicron processor design. - Mongkol Ekpanyapong; Jacob R. Minz; Thaisiri Watewai; Hsien-Hsin S. Lee; Sung Kyu Lim (DAC, 2004)

Net and Pin Distribution for 3D Package Global Routing. - Jacob R. Minz; Mohit Pathak; Sung Kyu Lim (DATE, 2004)

3D module placement for congestion and power noise reduction. - Jacob R. Minz; Sung Kyu Lim; Cheng-Kok Koh (ACM Great Lakes Symposium on VLSI, 2005)

Reliability-aware floorplanning for 3D circuits. - Jacob R. Minz; Eric Wong 002; Sung Kyu Lim (SoCC, 2005)

Optical routing for 3D system-on-package. - Jacob R. Minz; Somaskanda Thyagaraja; Sung Kyu Lim (DATE, 2006)

Profile-guided microarchitectural floor planning for deep submicron processor design. - Mongkol Ekpanyapong; Jacob R. Minz; Thaisiri Watewai; Hsien-Hsin S. Lee; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Block-level 3-D Global Routing With an Application to 3-D Packaging. - Jacob R. Minz; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Multi-Objective Module Placement For 3-D System-On-Package. - Eric Wong 002; Jacob R. Minz; Sung Kyu Lim (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Physical Design Automation for System-on-Packages and 3D-Integrated Circuits. - Jacob R. Minz (2006)

Decoupling-Capacitor Planning and Sizing for Noise and Leakage Reduction. - Eric Wong 002; Jacob R. Minz; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Buffered clock tree synthesis for 3D ICs under thermal variations. - Jacob R. Minz; Xin Zhao 001; Sung Kyu Lim (ASP-DAC, 2008)