A DSP-like analogue processing unit for smart image sensors. - Antoine Dupret; Jacques-Olivier Klein; Abdallah Nshare (Int. J. Circuit Theory Appl., 2002)

An improved analog computation cell for Paris II, a programmable vision chip. - Sebastien Moutault; Hervé Mathias; Jacques-Olivier Klein; Antoine Dupret (ISCAS (5), 2004)

Low Power Image Processing: Analog Versus Digital Comparison. - Jacques-Olivier Klein; Lionel Lacassagne; Hervé Mathias; Sebastien Moutault; Antoine Dupret (CAMP, 2005)

Synthesis of Finite State Machines with Magnetic Domain Wall Logic. - Jacques-Olivier Klein; Eric Belhaire; Claude Chappert; Florent Ouchet; Russell Cowburn; Dan Read; Dorothee Petit (ISCAS, 2007)

Image Processing Vision Systems: Standard Image Sensors Versus Retinas. - Abdelhafid Elouardi; Samir Bouaziz; Antoine Dupret; Lionel Lacassagne; Jacques-Olivier Klein; Roger Reynaud (IEEE Trans. Instrum. Meas., 2007)

A Smart Architecture for Low-Level Image Computing. - Abdelhafid Elouardi; Samir Bouaziz; Antoine Dupret; Lionel Lacassagne; Jacques-Olivier Klein; Roger Reynaud (Int. J. Comput. Sci. Appl., 2008)

High Density Asynchronous LUT Based on Non-volatile MRAM Technology. - Sumanta Chaudhuri; Weisheng Zhao; Jacques-Olivier Klein; Claude Chappert; Pascale Mazoyer (FPL, 2010)

Design of embedded MRAM macros for memory-in-logic applications. - Sumanta Chaudhuri; Weisheng Zhao; Jacques-Olivier Klein; Claude Chappert; Pascale Mazoyer (ACM Great Lakes Symposium on VLSI, 2010)

Magnetic Look-Up Table (MLUT) Featuring Radiation Hardness, High Performance and Low Power. - Yahya Lakys; Weisheng Zhao; Jacques-Olivier Klein; Claude Chappert (ARC, 2011)

Design of MRAM based logic circuits and its applications. - Weisheng Zhao; Lionel Torres; Yoann Guillemenet; Luis Vitório Cargnini; Yahya Lakys; Jacques-Olivier Klein; Dafine Ravelosona; Gilles Sassatelli; Claude Chappert (ACM Great Lakes Symposium on VLSI, 2011)

Robust neural logic block (NLB) based on memristor crossbar array. - Djaafar Chabi; Weisheng Zhao; Damien Querlioz; Jacques-Olivier Klein (NANOARCH, 2011)

High Performance SoC Design Using Magnetic Logic and Memory. - Weisheng Zhao; Lionel Torres; Luis Vitório Cargnini; Raphael Martins Brum; Yue Zhang 010; Yoann Guillemenet; Gilles Sassatelli; Yahya Lakys; Jacques-Olivier Klein; Daniel Etiemble; Dafine Ravelosona; Claude Chappert (VLSI-SoC (Selected Papers), 2011)

Embedded MRAM for high-speed computing. - Weisheng Zhao; Yue Zhang 010; Yahya Lakys; Jacques-Olivier Klein; Daniel Etiemble; D. Revelosona; Claude Chappert; Lionel Torres; Luis Vitório Cargnini; Raphael Martins Brum; Yoann Guillemenet; Gilles Sassatelli (VLSI-SoC, 2011)

Design considerations and strategies for high-reliable STT-MRAM. - Weisheng Zhao; Thibaut Devolder; Yahya Lakys; Jacques-Olivier Klein; Claude Chappert; Pascale Mazoyer (Microelectron. Reliab., 2011)

Design and Modeling of a Neuro-Inspired Learning Circuit Using Nanotube-Based Memory Devices. - Si-Yu Liao; Jean-Marie Retrouvey; Guillaume Agnus; Weisheng Zhao; Cristell Maneux; Sébastien Fregonese; Thomas Zimmer; Djaafar Chabi; Arianna Filoramo; Vincent Derycke; Christian Gamrat; Jacques-Olivier Klein (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

MRAM crossbar based configurable logic block. - Yahya Lakys; Weisheng Zhao; Jacques-Olivier Klein; Claude Chappert (ISCAS, 2012)

Nanodevice-based novel computing paradigms and the neuromorphic approach. - Weisheng Zhao; Damien Querlioz; Jacques-Olivier Klein; Djaafar Chabi; Claude Chappert (ISCAS, 2012)

Bioinspired networks with nanoscale memristive devices that combine the unsupervised and supervised learning approaches. - Damien Querlioz; Weisheng Zhao; Philippe Dollfus; Jacques-Olivier Klein; Olivier Bichler; Christian Gamrat (NANOARCH, 2012)

Crossbar architecture based on 2R complementary resistive switching memory cell. - Weisheng Zhao; Yue Zhang 010; Jacques-Olivier Klein; Damien Querlioz; Djaafar Chabi; Dafine Ravelosona; Claude Chappert; Jean-Michel Portal; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; Christophe Muller (NANOARCH, 2012)

Cross-point architecture for spin transfer torque magnetic random access memory - Weisheng Zhao; Sumanta Chaudhuri; Celso Accoto; Jacques-Olivier Klein; Claude Chappert; Pascale Mazoyer (CoRR, 2012)

Failure and reliability analysis of STT-MRAM. - Weisheng Zhao; Yue Zhang 010; Thibaut Devolder; Jacques-Olivier Klein; Dafine Ravelosona; Claude Chappert; Pascale Mazoyer (Microelectron. Reliab., 2012)

Design study of efficient digital order-based STDP neuron implementations for extracting temporal features. - David Roclin; Olivier Bichler; Christian Gamrat; Simon J. Thorpe; Jacques-Olivier Klein (IJCNN, 2013)

Analytical study of complementary memristive synchronous logic gates. - Jean-Michel Portal; Mathieu Moreau; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; Christophe Muller; Yue Zhang 010; Erya Deng; Jacques-Olivier Klein; Damien Querlioz; Dafine Ravelosona; Claude Chappert; et al. (NANOARCH, 2013)

Low power magnetic flip-flop based on checkpointing and self-enable mechanism. - Djaafar Chabi; Weisheng Zhao; Yue Zhang 010; Jacques-Olivier Klein; Claude Chappert (NEWCAS, 2013)

Synchronous full-adder based on complementary resistive switching memory cells. - Yue Zhang 010; Erya Deng; Jacques-Olivier Klein; Damien Querlioz; Dafine Ravelosona; Claude Chappert; Weisheng Zhao; Mathieu Moreau; Jean-Michel Portal; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; et al. (NEWCAS, 2013)

Emerging hybrid logic circuits based on non-volatile magnetic memories. - Weisheng Zhao; Guillaume Prenat; Jacques-Olivier Klein; Bernard Dieny; Claude Chappert; Dafine Ravelosona (NEWCAS, 2013)

Spin-electronics based logic fabrics. - Weisheng Zhao; Jacques-Olivier Klein; Zhaohao Wang; Yue Zhang 010; Nesrine Ben Romdhane; Damien Querlioz; Dafine Ravelosona; Claude Chappert (VLSI-SoC, 2013)

A low-cost built-in error correction circuit design for STT-MRAM reliability improvement. - Wang Kang 001; Weisheng Zhao; Zhaohao Wang; Yue Zhang 010; Jacques-Olivier Klein; Youguang Zhang; Claude Chappert; Dafine Ravelosona (Microelectron. Reliab., 2013)

Magnetic Adder Based on Racetrack Memory. - Hong-Phuc Trinh; Weisheng Zhao; Jacques-Olivier Klein; Yue Zhang 010; Dafine Ravelosona; Claude Chappert (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

An overview of spin-based integrated circuits. - Wang Kang 001; Weisheng Zhao; Zhaohao Wang; Jacques-Olivier Klein; Yue Zhang 010; Djaafar Chabi; Youguang Zhang; Dafine Ravelosona; Claude Chappert (ASP-DAC, 2014)

Spintronics for low-power computing. - Yue Zhang 010; Weisheng Zhao; Jacques-Olivier Klein; Wang Kang 001; Damien Querlioz; Youguang Zhang; Dafine Ravelosona; Claude Chappert (DATE, 2014)

Ferroelectric tunnel memristor-based neuromorphic network with 1T1R crossbar architecture. - Zhaohao Wang; Weisheng Zhao; Wang Kang 001; Youguang Zhang; Jacques-Olivier Klein; Claude Chappert (IJCNN, 2014)

Spin-transfer torque magnetic memory as a stochastic memristive synapse. - Adrien F. Vincent; Jerome Larroque; Weisheng Zhao; Nesrine Ben Romdhane; Olivier Bichler; Christian Gamrat; Jacques-Olivier Klein; Sylvie Galdin-Retailleau; Damien Querlioz (ISCAS, 2014)

On-chip supervised learning rule for ultra high density neural crossbar using memristor for synapse and neuron. - Djaafar Chabi; Zhaohao Wang; Weisheng Zhao; Jacques-Olivier Klein (NANOARCH, 2014)

Sneak paths effects in CBRAM memristive devices arrays for spiking neural networks. - David Roclin; Olivier Bichler; Christian Gamrat; Jacques-Olivier Klein (NANOARCH, 2014)

Design and analysis of Racetrack memory based on magnetic domain wall motion in nanowires. - Nesrine Ben Romdhane; Weisheng Zhao; Yue Zhang 010; Jacques-Olivier Klein; Z. R. Wang; Dafine Ravelosona (NANOARCH, 2014)

One-step majority-logic-decodable codes enable STT-MRAM for high speed working memories. - Wang Kang 001; Weisheng Zhao; Lun Yang; Jacques-Olivier Klein; Youguang Zhang; Dafine Ravelosona (NVMSA, 2014)

Robust learning approach for neuro-inspired nanoscale crossbar architecture. - Djaafar Chabi; Damien Querlioz; Weisheng Zhao; Jacques-Olivier Klein (ACM J. Emerg. Technol. Comput. Syst., 2014)

Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells. - Weisheng Zhao; Jean-Michel Portal; Wang Kang 001; Mathieu Moreau; Yue Zhang 010; Hassen Aziza; Jacques-Olivier Klein; Zhaohao Wang; Damien Querlioz; Damien Deleruyelle; Marc Bocquet; Dafine Ravelosona; et al. (J. Parallel Distributed Comput., 2014)

Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses. - You Wang 002; Yue Zhang 010; Erya Deng; Jacques-Olivier Klein; Lirida A. B. Naviner; Weisheng Zhao (Microelectron. Reliab., 2014)

Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms. - Djaafar Chabi; Weisheng Zhao; Erya Deng; Yue Zhang 010; Nesrine Ben Romdhane; Jacques-Olivier Klein; Claude Chappert (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. - Weisheng Zhao; Mathieu Moreau; Erya Deng; Yue Zhang 010; Jean-Michel Portal; Jacques-Olivier Klein; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; Christophe Muller; Damien Querlioz; Nesrine Ben Romdhane; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Spintronic devices as key elements for energy-efficient neuroinspired architectures. - Nicolas Locatelli; Adrien F. Vincent; Alice Mizrahi; Joseph S. Friedman; Damir Vodenicarevic; Joo-Von Kim; Jacques-Olivier Klein; Weisheng Zhao; Julie Grollier; Damien Querlioz (DATE, 2015)

From device to system: cross-layer design exploration of racetrack memory. - Guangyu Sun 003; Chao Zhang 007; Hehe Li; Yue Zhang 010; Weiqi Zhang; Yizi Gu; Yinan Sun; Jacques-Olivier Klein; Dafine Ravelosona; Yongpan Liu; Weisheng Zhao; Huazhong Yang (DATE, 2015)

Vortex-based spin transfer oscillator compact model for IC design. - Nicolas Locatelli; Damir Vodenicarevic; Weisheng Zhao; Jacques-Olivier Klein; Julie Grollier; Damien Querlioz (ISCAS, 2015)

Perspectives of racetrack memory based on current-induced domain wall motion: From device to system. - Yue Zhang 010; Chao Zhang 007; Jacques-Olivier Klein; Dafine Ravelosona; Guangyu Sun 003; Weisheng Zhao (ISCAS, 2015)

Channel Modeling and Reliability Enhancement Design Techniques for STT-MRAM. - Liuyang Zhang; Wang Kang 001; Youguang Zhang; Yuanqing Cheng; Lang Zeng; Jacques-Olivier Klein; Weisheng Zhao (ISVLSI, 2015)

Full-adder circuit design based on all-spin logic device. - Qi An; Li Su; Jacques-Olivier Klein; Sébastien Le Beux; Ian O'Connor; Weisheng Zhao (NANOARCH, 2015)

Supervised learning with organic memristor devices and prospects for neural crossbar arrays. - Christopher H. Bennett; Djaafar Chabi; Theo Cabaret; Bruno Jousselme; Vincent Derycke; Damien Querlioz; Jacques-Olivier Klein (NANOARCH, 2015)

Robust magnetic full-adder with voltage sensing 2T/2MTJ cell. - Erya Deng; You Wang 002; Zhaohao Wang; Jacques-Olivier Klein; Bernard Dieny; Guillaume Prenat; Weisheng Zhao (NANOARCH, 2015)

Read disturbance issue for nanoscale STT-MRAM. - Yi Ran; Wang Kang 001; Youguang Zhang; Jacques-Olivier Klein; Weisheng Zhao (NVMSA, 2015)

Yield and Reliability Improvement Techniques for Emerging Nonvolatile STT-MRAM. - Wang Kang 001; Liuyang Zhang; Weisheng Zhao; Jacques-Olivier Klein; Youguang Zhang; Dafine Ravelosona; Claude Chappert (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

On-Chip Universal Supervised Learning Methods for Neuro-Inspired Block of Memristive Nanodevices. - Djaafar Chabi; Weisheng Zhao; Damien Querlioz; Jacques-Olivier Klein (ACM J. Emerg. Technol. Comput. Syst., 2015)

Spintronics: Emerging Ultra-Low-Power Circuits and Systems beyond MOS Technology. - Wang Kang 001; Yue Zhang 010; Zhaohao Wang; Jacques-Olivier Klein; Claude Chappert; Dafine Ravelosona; Gefei Wang; Youguang Zhang; Weisheng Zhao (ACM J. Emerg. Technol. Comput. Syst., 2015)

Compact thermal modeling of spin transfer torque magnetic tunnel junction. - You Wang 002; Hao Cai 001; Lirida A. B. Naviner; Yue Zhang 010; Jacques-Olivier Klein; Weisheng Zhao (Microelectron. Reliab., 2015)

Spin-Transfer Torque Magnetic Memory as a Stochastic Memristive Synapse for Neuromorphic Systems. - Adrien F. Vincent; Jerome Larroque; Nicolas Locatelli; Nesrine Ben Romdhane; Olivier Bichler; Christian Gamrat; Weisheng Zhao; Jacques-Olivier Klein; Sylvie Galdin-Retailleau; Damien Querlioz (IEEE Trans. Biomed. Circuits Syst., 2015)

Synchronous 8-bit Non-Volatile Full-Adder based on Spin Transfer Torque Magnetic Tunnel Junction. - Erya Deng; Yue Zhang 010; Wang Kang 001; Bernard Dieny; Jacques-Olivier Klein; Guillaume Prenat; Weisheng Zhao (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A recurrent crossbar of memristive nanodevices implements online novelty detection. - Christopher H. Bennett; Damien Querlioz; Jacques-Olivier Klein (ICRC, 2016)

Exploiting the short-term to long-term plasticity transition in memristive nanodevice learning architectures. - Christopher H. Bennett; Selina La Barbera; Adrien F. Vincent; Jacques-Olivier Klein; Fabien Alibart; Damien Querlioz (IJCNN, 2016)

A novel circuit design of true random number generator using magnetic tunnel junction. - You Wang 002; Hao Cai 001; Lirida A. B. Naviner; Jacques-Olivier Klein; Jianlei Yang 001; Weisheng Zhao (NANOARCH, 2016)

Stochastic spintronic device based synapses and spiking neurons for neuromorphic computation. - Deming Zhang; Lang Zeng; Youguang Zhang; Weisheng Zhao; Jacques-Olivier Klein (NANOARCH, 2016)

Read disturbance issue and design techniques for nanoscale STT-MRAM. - Yi Ran; Kang Wang 001; Youguang Zhang; Jacques-Olivier Klein; Weisheng Zhao (J. Syst. Archit., 2016)

A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI. - You Wang 002; Hao Cai 001; Lirida A. B. Naviner; Xiaoxuan Zhao; Yue Zhang 010; Mariem Slimani; Jacques-Olivier Klein; Weisheng Zhao (Microelectron. Reliab., 2016)

All Spin Artificial Neural Networks Based on Compound Spintronic Synapse and Neuron. - Deming Zhang; Lang Zeng; Kaihua Cao; Mengxing Wang 001; Shouzhong Peng; Yue Zhang 010; Youguang Zhang; Jacques-Olivier Klein; Yu Wang 002; Weisheng Zhao (IEEE Trans. Biomed. Circuits Syst., 2016)

Perspectives of Racetrack Memory for Large-Capacity On-Chip Memory: From Device to System. - Yue Zhang 010; Chao Zhang 007; Jiang Nan; Zhizhong Zhang 004; Xueying Zhang; Jacques-Olivier Klein; Dafine Ravelosona; Guangyu Sun 003; Weisheng Zhao (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Offset Analysis and Design Optimization of a Dynamic Sense Amplifier for Resistive Memories. - Salmen Mraihi; El Mehdi Boujamaa; Cyrille Dray; Jacques-Olivier Klein (ISVLSI, 2017)

Spatio-temporal learning with arrays of analog nanosynapses. - Christopher H. Bennett; Damien Querlioz; Jacques-Olivier Klein (NANOARCH, 2017)

Arithmetic Logic Unit based on all-spin logic devices. - Qi An; Sébastien Le Beux; Ian O'Connor; Jacques-Olivier Klein; Weisheng Zhao (NEWCAS, 2017)

Large scale, high density integration of all spin logic. - Qi An; Sébastien Le Beux; Ian O'Connor; Jacques-Olivier Klein (DATE, 2018)

Multiscaled Simulation Methodology for Neuro-Inspired Circuits Demonstrated with an Organic Memristor. - Christopher H. Bennett; Jean-Etienne Lorival; François Marc; Theo Cabaret; Bruno Jousselme; Vincent Derycke; Jacques-Olivier Klein; Cristell Maneux (IEEE Trans. Multi Scale Comput. Syst., 2018)

Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks. - Tifenn Hirtzlin; Marc Bocquet; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (AICAS, 2019)

Memory-Centric Neuromorphic Computing With Nanodevices. - Damien Querlioz; Julie Grollier; Tifenn Hirtzlin; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Marc Bocquet; Jean-Michel Portal; Miguel Romera; Philippe Talatchian (BioCAS, 2019)

Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction. - Tifenn Hirtzlin; Bogdan Penkovsky; Jacques-Olivier Klein; Nicolas Locatelli; Adrien F. Vincent; Marc Bocquet; Jean-Michel Portal; Damien Querlioz (NANOARCH, 2019)

Contrasting Advantages of Learning With Random Weights and Backpropagation in Non-Volatile Memory Neural Networks. - Christopher H. Bennett; Vivek Parmar; Laurie E. Calvet; Jacques-Olivier Klein; Manan Suri; Matthew J. Marinella; Damien Querlioz (IEEE Access, 2019)

Stochastic Computing for Hardware Implementation of Binarized Neural Networks. - Tifenn Hirtzlin; Bogdan Penkovsky; Marc Bocquet; Jacques-Olivier Klein; Jean-Michel Portal; Damien Querlioz (IEEE Access, 2019)

In-Memory and Error-Immune Differential RRAM Implementation of Binarized Deep Neural Networks. - Marc Bocquet; Tifenn Hirtzlin; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (CoRR, 2019)

Digital Biologically Plausible Implementation of Binarized Neural Networks with Differential Hafnium Oxide Resistive Memory Arrays. - Tifenn Hirtzlin; Marc Bocquet; Bogdan Penkovsky; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (CoRR, 2019)

A comprehensive compact model for the design of all-spin-logic based circuits. - Qi An; Sébastien Le Beux; Ian O'Connor; Jacques-Olivier Klein (Microelectron. J., 2019)

Ultra-Dense Ring-Shaped Racetrack Memory Cache Design. - Guanda Wang; Yue Zhang 010; Beibei Zhang; Bi Wu; Jiang Nan; Xueying Zhang; Zhizhong Zhang 004; Jacques-Olivier Klein; Dafine Ravelosona; Zhaohao Wang; Youguang Zhang; Weisheng Zhao (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. - Axel Laborieux; Marc Bocquet; Tifenn Hirtzlin; Jacques-Olivier Klein; Liza Herrera Diez; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (AICAS, 2020)

In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. - Bogdan Penkovsky; Marc Bocquet; Tifenn Hirtzlin; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (DATE, 2020)

Embracing the Unreliability of Memory Devices for Neuromorphic Computing. - Marc Bocquet; Tifenn Hirtzlin; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (IRPS, 2020)

Model of the Weak Reset Process in HfOx Resistive Memory for Deep Learning Frameworks. - Atreya Majumdar; Marc Bocquet; Tifenn Hirtzlin; Axel Laborieux; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (CoRR, 2021)

Implementation of Ternary Weights With Resistive RAM Using a Single Sense Operation Per Synapse. - Axel Laborieux; Marc Bocquet; Tifenn Hirtzlin; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Improving Normalizing Flows with the Approximate Mass for Out-of-Distribution Detection. - Samy Chali; Inna Kucher; Marc Duranton; Jacques-Olivier Klein (CVPR Workshops, 2023)