A 500-Mb/s quadruple data rate SDRAM interface using a skew cancellation technique. - Sung-Ho Wang; Jeongpyo Kim; Joonsuk Lee; Hyoung Sik Nam; Young Gon Kim; Jae Hoon Shim; Hyung Ki Ahn; Seok Kang; Bong Hwa Jeong; Jin-Hong Ahn; Beomsup Kim (IEEE J. Solid State Circuits, 2001)

A hybrid delta-sigma modulator with adaptive calibration. - Jae Hoon Shim; In-Cheol Park; Beomsup Kim (ISCAS (1), 2003)

A third-order ΣΔ modulator in 0.18-μm CMOS with calibrated mixed-mode integrators. - Jae Hoon Shim; In-Cheol Park; Beomsup Kim (IEEE J. Solid State Circuits, 2005)

Correction to "A Third-Order$Sigma Delta $Modulator in 0.18-$muhboxm$CMOS With Calibrated Mixed-Mode Integrators". - Jae Hoon Shim; In-Cheol Park; Beomsup Kim (IEEE J. Solid State Circuits, 2005)

Hybrid ΣΔ modulators with adaptive calibration. - Jae Hoon Shim; In-Cheol Park; Beomsup Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

A 10Gb/s CMOS CDR and DEMUX IC with a Quarter-Rate Linear Phase Detector. - Sangjin Byun; Jyung Chan Lee; Jae Hoon Shim; Kwangjoon Kim; Hyun-Kyu Yu (ISSCC, 2006)

A 10-Gb/s CMOS CDR and DEMUX IC With a Quarter-Rate Linear Phase Detector. - Sangjin Byun; Jyung Chan Lee; Jae Hoon Shim; Kwangjoon Kim; Hyun-Kyu Yu (IEEE J. Solid State Circuits, 2006)

Charge Pump circuit with wide range digital leakage current mismatch compensator. - Sangjin Byun; Jae Hoon Shim (IEICE Electron. Express, 2010)

The Impact of 3D Stacking and Technology Scaling on the Power and Area of Stereo Matching Processors. - Seung-Ho Ok; Yong-Hwan Lee; Jae Hoon Shim; Sung Kyu Lim; Byungin Moon (Sensors, 2017)

A Low-Power 2nd-Order Delta-Sigma ADC with an Inverter-Based Zero-Crossing Detector. - Dong-Jick Min; Sun Youl Choi; Jae Hoon Shim (ICECS, 2018)

3D die-stacked DRAM thermal management via task allocation and core pipeline control. - Changho Yoon; Jae Hoon Shim; Byungin Moon; Joonho Kong (IEICE Electron. Express, 2018)

Modified adaptive support weight and disparity search range estimation schemes for stereo matching processors. - Seung-Ho Ok; Jae Hoon Shim; Byungin Moon (J. Supercomput., 2018)

Network Intrusion Detection with Improved Feature Representation. - Geonsu Lee; Hochang Rhee; Jae Hoon Shim; Hyung Il Koo; Nam Ik Cho (APSIPA ASC, 2021)

Lossless Image Compression Based on Image Decomposition and Progressive Prediction Using Convolutional Neural Networks. - Jae Hoon Shim; Hochang Rhee; Yeong Il Jang; Geonsu Lee; Seyun Kim; Nam Ik Cho (APSIPA ASC, 2021)

A Zero-Crossing-Based Integrator with Bidirectional Two-Phase Charging and Selective-Reset Operations for ΔΣ ADCs. - Dong-Jick Min; Jae Hoon Shim (ISCAS, 2021)

An Output-Capacitor-Free Adaptive-Frequency Digital LDO with a 420-mA Load Current and a Fast Settling Time. - Dong-Jick Min; Jun-Gi Lee; Kunhee Cho; Jae Hoon Shim (ISCAS, 2023)

An Output-Capacitor-Free NMOS Digital LDO Using Gate Driving Strength Modulation and Droop Detector. - Jaejin Kim; Gunmo Koo; Seongmin Lee 010; Jae Hoon Shim; Kunhee Cho (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Enhancing Semiconductor X-RAY Images: A Framework Combining Denoising and Super-Resolution Modules With a Novel Dataset. - Jae Hoon Shim; Min Woo Kim; Tae Gyu Lim; Byungseok Min; Sang Hwa Lee; Nam Ik Cho (APSIPA, 2024)