Solving a nonlinear output regulation problem: zero miss distance of pure PNG. - Jae-Hyuk Oh (IEEE Trans. Autom. Control., 2002)

Novel bootstrapped CMOS differential logic family for ultra-low voltage SoCs. - Byung Hwa Jung; Sung-Chan Kang; Jae-Hyuk Oh; Yoon-Suk Park; Yong-Ki Kim 002; Yonggu Kang; Jong-Woo Kim; Bai-Sun Kong (IEICE Electron. Express, 2008)

Low-Power CMOS Synchronous Counter With Clock Gating Embedded Into Carry Propagation. - Young-Won Kim; Joo-Seong Kim; Jae-Hyuk Oh; Yoon-Suk Park; Jong-Woo Kim; Kwang-Il Park; Bai-Sun Kong; Young-Hyun Jun (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Dynamic Differential Flip-Flop without Explicit Output Latching Stage for High-Speed SoC. - Min-su Kim; Wonhyun Choi; Jong-Woo Kim; Chunghee Kim; Jae-Hyuk Oh; Bai-Sun Kong (ICECS, 2021)