The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs. - Michael B. Taylor; Jason Sungtae Kim; Jason E. Miller; David Wentzlaff; Fae Ghodrat; Ben Greenwald; Henry Hoffmann; Paul R. Johnson; Jae W. Lee; Walter Lee; Albert Ma; Arvind Saraf; et al. (IEEE Micro, 2002)

Secure program execution via dynamic information flow tracking. - G. Edward Suh; Jae W. Lee; David Zhang 001; Srinivas Devadas (ASPLOS, 2004)

Extracting secret keys from integrated circuits. - Daihyun Lim; Jae W. Lee; Blaise Gassend; G. Edward Suh; Marten van Dijk; Srinivas Devadas (IEEE Trans. Very Large Scale Integr. Syst., 2005)

METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors. - Jae W. Lee; Krste Asanovic (IEEE Real Time Technology and Applications Symposium, 2006)

Continual hashing for efficient fine-grain state inconsistency detection. - Jae W. Lee; Myron King; Krste Asanovic (ICCD, 2007)

Approximating age-based arbitration in on-chip networks. - Michael Mihn-Jong Lee; John Kim 001; Dennis Abts; Michael R. Marty; Jae W. Lee (PACT, 2010)

Scalable Speculative Parallelization on Commodity Clusters. - Hanjun Kim 001; Arun Raman; Feng Liu; Jae W. Lee; David I. August (MICRO, 2010)

Probabilistic Distance-Based Arbitration: Providing Equality of Service for Many-Core CMPs. - Michael Mihn-Jong Lee; John Kim 001; Dennis Abts; Michael R. Marty; Jae W. Lee (MICRO, 2010)

Parallelism orchestration using DoPE: the degree of parallelism executive. - Arun Raman; Hanjun Kim 001; Taewook Oh; Jae W. Lee; David I. August (PLDI, 2011)

From sequential programming to flexible parallel execution. - Arun Raman; Jae W. Lee; David I. August (CASES, 2012)

Automatic speculative DOALL for clusters. - Hanjun Kim 001; Nick P. Johnson; Jae W. Lee; Scott A. Mahlke; David I. August (CGO, 2012)

Runtime asynchronous fault tolerance via speculation. - Yun Zhang 005; Soumyadeep Ghosh; Jialu Huang; Jae W. Lee; Scott A. Mahlke; David I. August (CGO, 2012)

Parcae: a system for flexible parallel execution. - Arun Raman; Ayal Zaks; Jae W. Lee; David I. August (PLDI, 2012)

DAFT: Decoupled Acyclic Fault Tolerance. - Yun Zhang 005; Jae W. Lee; Nick P. Johnson; David I. August (Int. J. Parallel Program., 2012)

Globally Synchronized Frames for guaranteed quality-of-service in on-chip networks. - Jae W. Lee; Man Cheuk Ng; Krste Asanovic (J. Parallel Distributed Comput., 2012)

Practical automatic loop specialization. - Taewook Oh; Hanjun Kim 001; Nick P. Johnson; Jae W. Lee; David I. August (ASPLOS, 2013)

Reducing memory access latency with asymmetric DRAM bank organizations. - Young Hoon Son; Seongil O; Yuhwan Ro; Jae W. Lee; Jung Ho Ahn (ISCA, 2013)

Practical speculative parallelization of variable-length decompression algorithms. - Hakbeom Jang; Channoh Kim; Jae W. Lee (LCTES, 2013)

Security Vulnerability in Processor-Interconnect Router Design. - WonJun Song; John Kim 001; Jae W. Lee; Dennis Abts (CCS, 2014)

eDRAM-based tiered-reliability memory with applications to low-power frame buffers. - Kyungsang Cho; Yongjun Lee; Young H. Oh; Gyoo-Cheol Hwang; Jae W. Lee (ISLPED, 2014)

QPR.js: a runtime framework for QoS-aware power optimization for parallel JavaScript programs. - Wonjun Lee; Channoh Kim; Houp Song; Jae W. Lee (ISLPED, 2014)

Microbank: Architecting Through-Silicon Interposer-Based Main Memory Systems. - Young Hoon Son; Seongil O; Hyunggyun Yang; Daejin Jung; Jung Ho Ahn; John Kim 001; Jangwoo Kim; Jae W. Lee (SC, 2014)

Efficient CPU-GPU work sharing for data-parallel JavaScript workloads. - Xianglan Piao; Channoh Kim; Younghwan Oh; Hanjun Kim 001; Jae W. Lee (WWW (Companion Volume), 2014)

Low-Overhead Network-on-Chip Support for Location-Oblivious Task Placement. - Gwangsun Kim; Michael Mihn-Jong Lee; John Kim 001; Jae W. Lee; Dennis Abts; Michael R. Marty (IEEE Trans. Computers, 2014)

A fully associative, tagless DRAM cache. - Yongjun Lee; Jongwon Kim; Hakbeom Jang; Hyunggyun Yang; Jangwoo Kim; Jinkyu Jeong; Jae W. Lee (ISCA, 2015)

JAWS: a JavaScript framework for adaptive CPU-GPU work sharing. - Xianglan Piao; Channoh Kim; Younghwan Oh; Huiying Li; Jincheon Kim; Hanjun Kim 001; Jae W. Lee (PPoPP, 2015)

A neural network accelerator for mobile application processors. - Doo-Young Kim; Jin Min Kim; Hakbeom Jang; Jinkyu Jeong; Jae W. Lee (IEEE Trans. Consumer Electron., 2015)

Speculatively Exploiting Cross-Invocation Parallelism. - Jialu Huang; Prakash Prabhu; Thomas B. Jablin; Soumyadeep Ghosh; Sotiris Apostolakis; Jae W. Lee; David I. August (PACT, 2016)

Efficient footprint caching for Tagless DRAM Caches. - Hakbeom Jang; Yongjun Lee; Jongwon Kim; Youngsok Kim; Jangwoo Kim; Jinkyu Jeong; Jae W. Lee (HPCA, 2016)

Short-Circuit Dispatch: Accelerating Virtual Machine Interpreters on Embedded Processors. - Channoh Kim; Sungmin Kim; Hyeon-Gyu Cho; Doo-Young Kim; Jaehyeok Kim; Young H. Oh; Hakbeom Jang; Jae W. Lee (ISCA, 2016)

An eDRAM-Based Approximate Register File for GPUs. - Donghwan Jeong; Young H. Oh; Jae W. Lee; Yongjun Park 001 (IEEE Des. Test, 2016)

Workload-Aware Optimal Power Allocation on Single-Chip Heterogeneous Processors. - Jae Young Jang; Hao Wang 011; Euijin Kwon; Jae W. Lee; Nam Sung Kim (IEEE Trans. Parallel Distributed Syst., 2016)

Typed Architectures: Architectural Support for Lightweight Scripting. - Channoh Kim; Jaehyeok Kim; Sungmin Kim; Doo-Young Kim; Namho Kim; Gitae Na; Young H. Oh; Hyeon-Gyu Cho; Jae W. Lee (ASPLOS, 2017)

History-Based Arbitration for Fairness in Processor-Interconnect of NUMA Servers. - WonJun Song; Gwangsun Kim; Hyungjoon Jung; Jongwook Chung; Jung Ho Ahn; Jae W. Lee; John Kim 001 (ASPLOS, 2017)

Jointly optimizing task granularity and concurrency for in-memory mapreduce frameworks. - Jonghyun Bae; Hakbeom Jang; Wenjing Jin 001; Jun Heo 001; Jaeyoung Jang; Joo Young Hwang; Sangyeun Cho; Jae W. Lee (IEEE BigData, 2017)

Constructive Multi-User Interference for Symbol-Level Link Adaptation: MMSE Approach. - Yong I. Choi; Jae W. Lee; Chung Gu Kang 001; Minjoong Rim (GLOBECOM Workshops, 2017)

Context-Aware Memory Profiling for Speculative Parallelism. - Changsu Kim 004; Juhyun Kim; Juwon Kang; Jae W. Lee; Hanjun Kim 001 (HiPC, 2017)

SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures. - Yuhwan Ro; Hyunyoon Cho; Eojin Lee; Daejin Jung; Young Hoon Son; Jung Ho Ahn; Jae W. Lee (HPCA, 2017)

SALAD: Achieving Symmetric Access Latency with Asymmetric DRAM Architecture. - Young Hoon Son; Hyunyoon Cho; Yuhwan Ro; Jae W. Lee; Jung Ho Ahn (IEEE Comput. Archit. Lett., 2017)

Evaluation of Performance Unfairness in NUMA System Architecture. - WonJun Song; Hyungjoon Jung; Jung Ho Ahn; Jae W. Lee; John Kim 001 (IEEE Comput. Archit. Lett., 2017)

DRAM architecture for efficient data lifetime management. - Yongjun Lee; Yunkeuk Kim; Jinkyu Jeong; Jae W. Lee (IEICE Electron. Express, 2017)

Energy-efficient heterogeneous memory system for mobile platforms. - Dongsuk Shin; Hakbeom Jang; Jae W. Lee (IEICE Electron. Express, 2017)

On the Performance of Beam Division Nonorthogonal Multiple Access for FDD-Based Large-Scale Multi-User MIMO Systems. - Yong I. Choi; Jae W. Lee; Minjoong Rim; Chung Gu Kang 001 (IEEE Trans. Wirel. Commun., 2017)

A portable, automatic data qantizer for deep neural networks. - Young H. Oh; Quan Quan; Daeyeon Kim; Seonghak Kim; Jun Heo 001; Sungjun Jung; Jaeyoung Jang; Jae W. Lee (PACT, 2018)

Bandwidth-aware DRAM page migration for heterogeneous mobile memory systems. - Dongsuk Shin; Jae W. Lee (ICCE, 2018)

Erratum: Energy-efficient heterogeneous memory system for mobile platforms [IEICE Electronics Express Vol. 14 (2017) No. 24 pp. 20171002]. - Dongsuk Shin; Hakbeom Jang; Jae W. Lee (IEICE Electron. Express, 2018)

Enforcing Last-Level Cache Partitioning through Memory Virtual Channels. - Jongwook Chung; Yuhwan Ro; Joonsung Kim; Jaehyung Ahn; Jangwoo Kim; John Kim 001; Jae W. Lee; Jung Ho Ahn (PACT, 2019)

Charon: Specialized Near-Memory Processing Architecture for Clearing Dead Objects in Memory. - Jaeyoung Jang; Jun Heo 001; Yejin Lee 001; Jaeyeon Won; Seonghak Kim; Sungjun Jung; Hakbeom Jang; Tae Jun Ham; Jae W. Lee (MICRO, 2019)

Practical Erase Suspension for Modern Low-latency SSDs. - Shine Kim; Jonghyun Bae; Hakbeom Jang; Wenjing Jin 001; Jeonghun Gong; SeungYeon Lee; Tae Jun Ham; Jae W. Lee (USENIX ATC, 2019)

Asynchronous I/O Stack: A Low-latency Kernel I/O Stack for Ultra-Low Latency SSDs. - Gyusun Lee; Seokha Shin; Wonsuk Song; Tae Jun Ham; Jae W. Lee; Jinkyu Jeong (USENIX ATC, 2019)

Eager Memory Management for In-Memory Data Analytics. - Hakbeom Jang; Jonghyun Bae; Tae Jun Ham; Jae W. Lee (IEICE Trans. Inf. Syst., 2019)

SSDStreamer: Specializing I/O Stack for Large-Scale Machine Learning. - Jonghyun Bae; Hakbeom Jang; Jeonghun Gong; Wenjing Jin 001; Shine Kim; Jaeyoung Jang; Tae Jun Ham; Jinkyu Jeong; Jae W. Lee (IEEE Micro, 2019)

IIU: Specialized Architecture for Inverted Index Search. - Jun Heo 001; Jaeyeon Won; Yejin Lee 001; Shivam Bharuka; Jaeyoung Jang; Tae Jun Ham; Jae W. Lee (ASPLOS, 2020)

A3: Accelerating Attention Mechanisms in Neural Networks with Approximation. - Tae Jun Ham; Sungjun Jung; Seonghak Kim; Young H. Oh; Yeonhong Park; Yoonho Song; Jung-Hun Park; Sanghee Lee 002; Kyoung Park; Jae W. Lee; Deog-Kyoon Jeong (HPCA, 2020)

Unlocking Wordline-level Parallelism for Fast Inference on RRAM-based DNN Accelerator. - Yeonhong Park; Seung Yul Lee; Hoon Shin; Jun Heo 001; Tae Jun Ham; Jae W. Lee (ICCAD, 2020)

Genesis: A Hardware Acceleration Framework for Genomic Data Analysis. - Tae Jun Ham; David Bruns-Smith; Brendan Sweeney; Yejin Lee 001; Seong Hoon Seo; U. Gyeong Song; Young H. Oh; Krste Asanovic; Jae W. Lee; Lisa Wu Wills (ISCA, 2020)

A Specialized Architecture for Object Serialization with Applications to Big Data Analytics. - Jaeyoung Jang; Sungjun Jung; Sunmin Jeong; Jun Heo 001; Hoon Shin; Tae Jun Ham; Jae W. Lee (ISCA, 2020)

A Case for Hardware-Based Demand Paging. - Gyusun Lee; Wenjing Jin 001; Wonsuk Song; Jeonghun Gong; Jonghyun Bae; Tae Jun Ham; Jae W. Lee; Jinkyu Jeong (ISCA, 2020)

Graphene: Strong yet Lightweight Row Hammer Protection. - Yeonhong Park; Woosuk Kwon; Eojin Lee; Tae Jun Ham; Jung Ho Ahn; Jae W. Lee (MICRO, 2020)

MERCI: efficient embedding reduction on commodity hardware via sub-query memoization. - Yejin Lee 001; Seong Hoon Seo; Hyunji Choi; Hyoung Uk Sul; Soosung Kim 001; Jae W. Lee; Tae Jun Ham (ASPLOS, 2021)

Message from the General Chair. - Jae W. Lee (CGO, 2021)

FlashNeuron: SSD-Enabled Large-Batch Training of Very Deep Neural Networks. - Jonghyun Bae; Jongsung Lee 001; Yunho Jin; Sam Son; Shine Kim; Hakbeom Jang; Tae Jun Ham; Jae W. Lee (FAST, 2021)

Behemoth: A Flash-centric Training Accelerator for Extreme-scale DNNs. - Shine Kim; Yunho Jin; Gina Sohn; Jonghyun Bae; Tae Jun Ham; Jae W. Lee (FAST, 2021)

Layerweaver: Maximizing Resource Utilization of Neural Processing Units via Layer-Wise Scheduling. - Young H. Oh; Seonghak Kim; Yunho Jin; Sam Son; Jonghyun Bae; Jongsung Lee 001; Yeonhong Park; Dong Uk Kim; Tae Jun Ham; Jae W. Lee (HPCA, 2021)

BOSS: Bandwidth-Optimized Search Accelerator for Storage-Class Memory. - Jun Heo 001; Seung Yul Lee; Sunhong Min; Yeonhong Park; Sungjun Jung; Tae Jun Ham; Jae W. Lee (ISCA, 2021)

ELSA: Hardware-Software Co-design for Efficient, Lightweight Self-Attention Mechanism in Neural Networks. - Tae Jun Ham; Yejin Lee 001; Seong Hoon Seo; Soosung Kim 001; Hyunji Choi; Sung Jun Jung; Jae W. Lee (ISCA, 2021)

MaPHeA: a lightweight memory hierarchy-aware profile-guided heap allocation framework. - Deok-Jae Oh; Yaebin Moon; Eojin Lee; Tae Jun Ham; Yongjun Park 001; Jae W. Lee; Jung Ho Ahn (LCTES, 2021)

ASAP: Fast Mobile Application Switch via Adaptive Prepaging. - Sam Son; Seung Yul Lee; Yunho Jin; Jonghyun Bae; Jinkyu Jeong; Tae Jun Ham; Jae W. Lee; Hongil Yoon (USENIX ATC, 2021)

An 8-bit Ring-Amplifier Based Mixed-Signal MAC Circuit With Full Digital Interface and Variable Accumulation Length. - Jongho Kim; Beomkyu Seo; Young H. Oh; Jung-Hoon Chun; Jae W. Lee; Jintae Kim (IEEE Access, 2021)

Accelerating Genomic Data Analytics With Composable Hardware Acceleration Framework. - Tae Jun Ham; Yejin Lee 001; Seong Hoon Seo; U. Gyeong Song; Jae W. Lee; David Bruns-Smith; Brendan Sweeney; Krste Asanovic; Young H. Oh; Lisa Wu Wills (IEEE Micro, 2021)

Effective zero compression on ReRAM-based sparse DNN accelerators. - Hoon Shin; Rihae Park; Seung Yul Lee; Yeonhong Park; Hyunseung Lee 001; Jae W. Lee (DAC, 2022)

L3: Accelerator-Friendly Lossless Image Format for High-Resolution, High-Throughput DNN Training. - Jonghyun Bae; Woohyeon Baek; Tae Jun Ham; Jae W. Lee (ECCV (11), 2022)

A Hardware Automated Domain-Specific Flash Memory System for Emerging Applications. - Shine Kim; Jae W. Lee (ICEIC, 2022)

A 40nm 5.6TOPS/W 239GOPS/mm2 Self-Attention Processor with Sign Random Projection-based Approximation. - Seong Hoon Seo; Soosung Kim 001; Sung Jun Jung; Sangwoo Kwon; Hyunseung Lee 001; Jae W. Lee (ESSCIRC, 2022)

Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh. - Michael Jaemin Kim; Jaehyun Park 006; Yeonhong Park; Wanju Doh; Namhoon Kim; Tae Jun Ham; Jae W. Lee; Jung Ho Ahn (HPCA, 2022)

ANNA: Specialized Architecture for Approximate Nearest Neighbor Search. - Yejin Lee 001; Hyunji Choi; Sunhong Min; Hyunseung Lee 001; Sangwon Beak; Dawoon Jeong; Jae W. Lee; Tae Jun Ham (HPCA, 2022)

ULPPACK: Fast Sub-8-bit Matrix Multiply on Commodity SIMD Hardware. - Jaeyeon Won; Jeyeon Si; Sam Son; Tae Jun Ham; Jae W. Lee (MLSys, 2022)

Layerweaver+: A QoS-Aware Layer-Wise DNN Scheduler for Multi-Tenant Neural Processing Units. - Young H. Oh; Yunho Jin; Tae Jun Ham; Jae W. Lee (IEICE Trans. Inf. Syst., 2022)

Ginex: SSD-enabled Billion-scale Graph Neural Network Training on a Single Machine via Provably Optimal In-memory Caching. - Yeonhong Park; Sunhong Min; Jae W. Lee (Proc. VLDB Endow., 2022)

Architecting a Flash-Based Storage System for Low-Cost Inference of Extreme-Scale DNNs. - Yunho Jin; Shine Kim; Tae Jun Ham; Jae W. Lee (IEEE Trans. Computers, 2022)

An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory. - Dongsuk Shin; Hakbeom Jang; Kiseok Oh; Jae W. Lee (ACM Trans. Embed. Comput. Syst., 2022)

Not All Neighbors Matter: Point Distribution-Aware Pruning for 3D Point Cloud. - Yejin Lee 001; Donghyun Lee 005; JungUk Hong; Jae W. Lee; Hongil Yoon (AAAI, 2023)

Liquid: Mix-and-Match Multiple Image Formats to Balance DNN Training Pipeline. - Woohyeon Baek; Jonghyun Bae; Donghyun Lee 005; Hyunwoong Bae; Yeonhong Park; Jae W. Lee (APSys, 2023)

A Memory-Efficient Edge Inference Accelerator with XOR-based Model Compression. - Hyunseung Lee 001; Jihoon Hong; Soosung Kim 001; Seung Yul Lee; Jae W. Lee (DAC, 2023)

FlowKV: A Semantic-Aware Store for Large-Scale State Management of Stream Processing Engines. - Gyewon Lee; Jaewoo Maeng; Jinsol Park; Jangho Seo; Haeyoon Cho 001; Youngseok Yang; Taegeon Um; Jongsung Lee 001; Jae W. Lee; Byung-Gon Chun (EuroSys, 2023)

DRAM Translation Layer: Software-Transparent DRAM Power Savings for Disaggregated Memory. - Wenjing Jin 001; Wonsuk Jang; Haneul Park; Jongsung Lee 001; Soosung Kim 001; Jae W. Lee (ISCA, 2023)

Special Issue on Top Picks From the 2022 Computer Architecture Conferences. - Christopher Batten; Jae W. Lee (IEEE Micro, 2023)

WALTZ: Leveraging Zone Append to Tighten the Tail Latency of LSM Tree on ZNS SSD. - Jongsung Lee 001; Dong Uk Kim; Jae W. Lee (Proc. VLDB Endow., 2023)

MaPHeA: A Framework for Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation. - Deok-Jae Oh; Yaebin Moon; Do Kyu Ham; Tae Jun Ham; Yongjun Park 001; Jae W. Lee; Jung Ho Ahn; Eojin Lee (ACM Trans. Embed. Comput. Syst., 2023)

A 4-bit 4.5-ns-Latency Pseudo-ReRAM Computing-In-Memory Macro With Self Error-Correcting DTC-Based WL Drivers and 6-bit CDAC-Less Column ADCs Having Ultra-Narrow Pitch. - Jongho Kim; Young H. Oh; Hyeonsik Kim; Jae W. Lee; Jintae Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

ReLUifying Smooth Functions: Low-Cost Knowledge Distillation to Obtain High-Performance ReLU Networks. - Soosung Kim 001; Yeonhong Park; Hyunseung Lee 001; Sungchan Yi; Jae W. Lee (ACCV (8), 2024)

Frugal 3D Point Cloud Model Training via Progressive Near Point Filtering and Fused Aggregation. - Donghyun Lee 005; Yejin Lee 001; Jae W. Lee; Hongil Yoon (ECCV (66), 2024)

A Processing-using-Memory Architecture for Commodity DRAM Devices with Enhanced Compatibility and Reliability. - Hoon Shin; Rihae Park; Jae W. Lee (ICCAD, 2024)

Any-Precision LLM: Low-Cost Deployment of Multiple, Different-Sized LLMs. - Yeonhong Park; Jake Hyun; SangLyul Cho; Bonggeun Sim; Jae W. Lee (ICML, 2024)

VGA: Hardware Accelerator for Scalable Long Sequence Model Inference. - Seung Yul Lee; Hyunseung Lee 001; Jihoon Hong; SangLyul Cho; Jae W. Lee (MICRO, 2024)

A Quantitative Analysis of State Space Model-Based Large Language Model: Study of Hungry Hungry Hippos. - Dongho Yoon; Taehun Kim; Jae W. Lee; Minsoo Rhu (IEEE Comput. Archit. Lett., 2024)

Pushing the Envelope of Low-Bit LLM via Dynamic Error Compensation. - Yeonhong Park; Jake Hyun; Hojoon Kim; Jae W. Lee (CoRR, 2024)

An LSM Tree Augmented with B+ Tree on Nonvolatile Memory. - Donguk Kim; Jongsung Lee 001; Keun Soo Lim; Jun Heo 001; Tae Jun Ham; Jae W. Lee (ACM Trans. Storage, 2024)

FACIL: Flexible DRAM Address Mapping for SoC-PIM Cooperative On-device LLM Inference. - Seong Hoon Seo; Junghoon Kim; Donghyun Lee 005; Seonah Yoo; Seokwon Moon; Yeonhong Park; Jae W. Lee (HPCA, 2025)

DecDEC: A Systems Approach to Advancing Low-Bit LLM Quantization. - Yeonhong Park; Jake Hyun; Hojoon Kim; Jae W. Lee (OSDI, 2025)

SkipLSM: Fast Retrieval of Hot Key-Value Pairs on LSM Tree. - Jongsung Lee 001; Sam Son; Jonghyun Bae; Yunho Jin; Tae Jun Ham; Jae W. Lee (SAC, 2025)

Transparent Smartphone Memory Expansion. - Gyusun Lee; Jinyong Park; Jae W. Lee; Jinkyu Jeong (SAC, 2025)

Angular Distance-Guided Neighbor Selection for Graph-Based Approximate Nearest Neighbor Search. - Sungjun Jung; Yongsang Park; Haeun Lee; Young H. Oh; Jae W. Lee (WWW, 2025)

GuidedQuant: Large Language Model Quantization via Exploiting End Loss Guidance. - Jinuk Kim; Marwa El Halabi; Wonpyo Park; Clemens JS Schaefer; Deokjae Lee; Yeonhong Park; Jae W. Lee; Hyun Oh Song (CoRR, 2025)

KVzip: Query-Agnostic KV Cache Compression with Context Reconstruction. - Jang-Hyun Kim; Jinuk Kim; Sangwoo Kwon; Jae W. Lee; Sangdoo Yun; Hyun Oh Song (CoRR, 2025)

NestedFP: High-Performance, Memory-Efficient Dual-Precision Floating Point Support for LLMs. - Haeun Lee; Omin Kwon; Yeonhong Park; Jae W. Lee (CoRR, 2025)

FastPoint: Accelerating 3D Point Cloud Model Inference via Sample Point Distance Prediction. - Donghyun Lee 005; Dawoon Jeong; Jae W. Lee; Hongil Yoon (CoRR, 2025)

DP-LLM: Runtime Model Adaptation with Dynamic Layer-wise Precision Assignment. - Sangwoo Kwon; Seong Hoon Seo; Jae W. Lee; Yeonhong Park (CoRR, 2025)