Analysis of Quarter Method Applied ROM-Based DDFS Architecture. - Jae-Yun Park; Su-Hyeon Kim; Hyunyoung Yoo; Jae-Won Nam (IEEE Access, 2023)

A 4.3 GS/s Time-Interleaved ΔΣ DAC With Temperature-Insensitive Bias and Harmonic Cancellation for Qubit Control. - Jae-Yun Park; Jae-Won Nam (IEEE Trans. Circuits Syst. II Express Briefs, 2024)