A variable-frequency parallel I/O interface with adaptive power-supply regulation. - Gu-Yeon Wei; Jaeha Kim; Dean Liu; Stefanos Sidiropoulos; Mark A. Horowitz (IEEE J. Solid State Circuits, 2000)

An efficient digital sliding controller for adaptive power-supply regulation. - Jaeha Kim; Mark A. Horowitz (IEEE J. Solid State Circuits, 2002)

Multi-gigabit-rate clock and data recovery based on blind oversampling. - Jaeha Kim; Deog-Kyoon Jeong (IEEE Commun. Mag., 2003)

Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL. - John G. Maneatis; Jaeha Kim; Iain McClatchie; Jay Maxey; Manjusha Shankaradas (IEEE J. Solid State Circuits, 2003)

Design of CMOS adaptive-bandwidth PLL/DLLs: a general approach. - Jaeha Kim; Mark A. Horowitz; Gu-Yeon Wei (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A 1.2-V-only 900-mW 10 gb ethernet transceiver and XAUI interface with robust VCO tuning technique. - Hyung-Rok Lee; Moon-Sang Hwang; Bong-Joon Lee; Young-Deok Kim; Dohwan Oh; Jaeha Kim; Sang-Hyun Lee; Deog-Kyoon Jeong; Wonchan Kim (IEEE J. Solid State Circuits, 2005)

Replica compensated linear regulators for supply-regulated phase-locked loops. - Elad Alon; Jaeha Kim; Sudhakar Pamarti; Ken Chang; Mark Horowitz (IEEE J. Solid State Circuits, 2006)

A 20-GHz phase-locked loop for 40-gb/s serializing transmitter in 0.13-μm CMOS. - Jaeha Kim; Jeong-Kyoum Kim; Bong-Joon Lee; Namhoon Kim; Deog-Kyoon Jeong; Wonchan Kim (IEEE J. Solid State Circuits, 2006)

Variable domain transformation for linear PAC analysis of mixed-signal systems. - Jaeha Kim; Kevin D. Jones; Mark A. Horowitz (ICCAD, 2007)

A Single-Pair Serial Link for Mobile Displays With Clock Edge Modulation Scheme. - Won-Jun Choe; Bong-Joon Lee; Jaeha Kim; Deog-Kyoon Jeong; Gyudong Kim (IEEE J. Solid State Circuits, 2007)

Characterization of random decision errors in clocked comparators. - Brian S. Leibowitz; Jaeha Kim; Jihong Ren; Chris J. Madden (CICC, 2008)

Impulse sensitivity function analysis of periodic circuits. - Jaeha Kim; Brian S. Leibowitz; Metha Jeeradit (ICCAD, 2008)

Mixed-Signal System Verification: A High-Speed Link Example. - Jaeha Kim (CAV, 2009)

Leveraging designer's intent: A path toward simpler analog CAD tools. - Jaeha Kim; Metha Jeeradit; ByongChan Lim; Mark A. Horowitz (CICC, 2009)

Stochastic steady-state and AC analyses of mixed-signal systems. - Jaeha Kim; Jihong Ren; Mark A. Horowitz (DAC, 2009)

An energy bounding approach for directional transparency in multiple degree-of-freedom haptic interaction. - Jaeha Kim; Jong-Phil Kim; Changhoon Seo; Jeha Ryu (WHC, 2009)

Energy-bounding algorithm for stable haptic interaction and bilateral teleoperation. - Changhoon Seo; Jong-Phil Kim; Jaeha Kim; Jeha Ryu (WHC, 2009)

A Fully Integrated 0.13-µm CMOS 40-Gb/s Serial Link Transceiver. - Jeong-Kyoum Kim; Jaeha Kim; Gyudong Kim; Deog-Kyoon Jeong (IEEE J. Solid State Circuits, 2009)

Accurate and Efficient CPU/GPU-Based 3-DOF Haptic Rendering of Complex Static Virtual Environments. - Jong-Phil Kim; Beom-Chan Lee; Hyungon Kim; Jaeha Kim; Jeha Ryu (Presence Teleoperators Virtual Environ., 2009)

Adaptive-Bandwidth Phase-Locked Loop With Continuous Background Frequency Calibration. - Jaeha Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

On-Chip Measurement of Jitter Transfer and Supply Sensitivity of PLL/DLLs. - Jaeha Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Design Optimization of On-Chip Inductive Peaking Structures for 0.13-μm CMOS 40-Gb/s Transmitter Circuits. - Jaeha Kim; Jeong-Kyoum Kim; Bong-Joon Lee; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Simulation and Analysis of Random Decision Errors in Clocked Comparators. - Jaeha Kim; Brian S. Leibowitz; Jihong Ren; Chris J. Madden (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Equalizer design and performance trade-offs in ADC-based serial links. - Jaeha Kim; Jihong Ren; Brian S. Leibowitz; Patrick Satarzadeh; Ali-Azam Abbasfar; Jared Zerbe (CICC, 2010)

An efficient test vector generation for checking analog/mixed-signal functional models. - ByongChan Lim; Jaeha Kim; Mark A. Horowitz (DAC, 2010)

Intent-leveraged optimization of analog circuits via homotopy. - Metha Jeeradit; Jaeha Kim; Mark Horowitz (DATE, 2010)

Enhancing rate-hardness of energy-bounding algorithm by considering Coulomb friction of haptic interface. - Jaeha Kim; Changhoon Seo; Jeha Ryu; Jong-Phil Kim (HAPTICS, 2010)

Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch. - Jaeha Kim; Kevin D. Jones; Mark A. Horowitz (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Fast and accurate event-driven simulation of mixed-signal systems with data supplementation. - Myeong-Jae Park; Hanseok Kim; Minbok Lee; Jaeha Kim (CICC, 2011)

Global convergence analysis of mixed-signal systems. - Sangho Youn; Jaeha Kim; Mark Horowitz (DAC, 2011)

Equalizer Design and Performance Trade-Offs in ADC-Based Serial Links. - Jaeha Kim; E-Hung Chen; Jihong Ren; Brian S. Leibowitz; Patrick Satarzadeh; Jared Zerbe; Chih-Kong Ken Yang (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

True event-driven simulation of analog/mixed-signal behaviors in SystemVerilog: A decision-feedback equalizing (DFE) receiver example. - Ji-Eun Jang; Myeong-Jae Park; Dongyun Lee; Jaeha Kim (CICC, 2012)

A 5-Gbps 1.7 pJ/bit ditherless CDR with optimal phase interval detection. - Myeong-Jae Park; Hanseok Kim; Seuk Son; Jaeha Kim (CICC, 2012)

Variability-aware, discrete optimization for analog circuits. - Seobin Jung; Yunju Choi; Jaeha Kim (DAC, 2012)

A model-first design and verification flow for analog-digital convergence systems: A high-speed receiver example in digital TVs. - Jaeha Kim; Sigang Ryu; Byoung-Joo Yoo; Hanseok Kim; Yunju Choi; Deog-Kyoon Jeong (ISCAS, 2012)

Design of low-power high-radix switch fabric with partially-activated input and output lines. - Jihyun Ryoo; Seuk Son; Jaeha Kim (ISOCC, 2012)

Memory-centric system interconnect design with Hybrid Memory Cubes. - Gwangsun Kim; John Kim 001; Jung Ho Ahn; Jaeha Kim (PACT, 2013)

Wireline transmitter and receiver design techniques. - Dennis Michael Fischette; Jaeha Kim (CICC, 2013)

Event-driven simulation of Volterra series models in SystemVerilog. - Ji-Eun Jang; Si-Jung Yang; Jaeha Kim (CICC, 2013)

Discretization and discrimination methods for design, verification, and testing of analog/mixed-signal circuits. - Jaeha Kim; Jiho Lee; Do-Gyoon Song; Taehwan Kim 007; Kyung-Hoon Kim; Seobin Jung; Sangho Youn (CICC, 2013)

An event-driven simulation methodology for integrated switching power supplies in SystemVerilog. - Ji-Eun Jang; Myeong-Jae Park; Jaeha Kim (DAC, 2013)

MPEG-V standardization for haptically interacting with virtual worlds. - Jaeha Kim; Yeongmi Kim; Jeha Ryu (World Haptics, 2013)

Verifying start-up failures in coupled ring oscillators in presence of variability using predictive global optimization. - Taehwan Kim 007; Do-Gyoon Song; Sangho Youn; Jaejin Park; Hojin Park; Jaeha Kim (ICCAD, 2013)

Robust random chip ID generation with wide-aperture clocked comparators and maximum likelihood detection. - Yunju Choi; Jaeha Kim (ISCAS, 2013)

A low-power high-radix switch fabric based on low-swing signaling and partially-activated input lines. - Do-Gyoon Song; Jaeha Kim (VLSI-DAT, 2013)

A 2.3-mW, 5-Gb/s Low-Power Decision-Feedback Equalizer Receiver Front-End and its Two-Step, Minimum Bit-Error-Rate Adaptation Algorithm. - Seuk Son; Hanseok Kim; Myeong-Jae Park; Kyung-Hoon Kim; E-Hung Chen; Brian S. Leibowitz; Jaeha Kim (IEEE J. Solid State Circuits, 2013)

Construction of a haptic-enabled broadcasting system based on the MPEG-V standard. - Jaeha Kim; Chang-Gyu Lee; Yeongmi Kim; Jeha Ryu (Signal Process. Image Commun., 2013)

Pseudo-Linear Analysis of Bang-Bang Controlled Timing Circuits. - Myeong-Jae Park; Jaeha Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Preventing Global Convergence Failure in Mixed-Signal Systems via Indeterminate State ('X') Elimination. - Sangho Youn; Jaeha Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Advanced modeling and simulation of state-of-the-art high-speed I/O interfaces. - Jaeha Kim (CICC, 2014)

PPV-based modeling and event-driven simulation of injection-locked oscillators in SystemVerilog. - Jaeha Kim; Si-Jung Yang; Ji-Eun Jang (CICC, 2014)

Probabilistic Bug Localization via Statistical Inference based on Partially Observed Data. - Sangho Youn; Chenjie Gu; Jaeha Kim (DAC, 2014)

A built-in self-test circuit for jitter tolerance measurement in high-speed wireline receivers. - Myeong-Jae Park; Jaeha Kim (ITC, 2014)

A 9.2 GHz Digital Phase-Locked Loop With Peaking-Free Transfer Function. - Sigang Ryu; Hwanseok Yeo; Yoontaek Lee; Seuk Son; Jaeha Kim (IEEE J. Solid State Circuits, 2014)

Variability-Aware, Discrete Optimization for Analog Circuits. - Seobin Jung; Jiho Lee; Jaeha Kim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Yield-Aware Pareto Front Extraction for Discrete Hierarchical Optimization of Analog Circuits. - Seobin Jung; Jiho Lee; Jaeha Kim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Linearization Technique for Binary Phase Detectors in a Collaborative Timing Recovery Circuit. - Byoung-Joo Yoo; Woo-Rham Bae; Jiho Han; Jaeha Kim; Deog-Kyoon Jeong (IEEE Trans. Very Large Scale Integr. Syst., 2014)

The contact/non-contact thimble haptic device. - Woohyeok Choi; Sung-moon Hur; Jaeha Kim; Yonghwan Oh (ICM, 2015)

A 2.5-V, 160-μJ-output piezoelectric energy harvester and power management IC for batteryless wireless switch (BWS) applications. - Joonseok Yang; Minbok Lee; Myeong-Jae Park; Sung-Youb Jung; Jaeha Kim (VLSIC, 2015)

Digital Analog Design: Enabling Mixed-Signal System Validation. - ByongChan Lim; Ji-Eun Jang; James Mao; Jaeha Kim; Mark Horowitz (IEEE Des. Test, 2015)

Jussi Ryynänen Introduction to the December Special Issue on the 2015 IEEE International Solid-State Circuits Conference. - Makoto Takamiya; Jieh-Tsorng Wu; Jussi Ryynänen; Kenichi Okada 001; Jaeha Kim (IEEE J. Solid State Circuits, 2015)

PPV-Based Modeling and Event-Driven Simulation of Injection-Locked Oscillators in SystemVerilog. - Ji-Eun Jang; Jaeha Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Depth Cube-Based Six Degree-of-Freedom Haptic Rendering for Rigid Bodies. - Jaeha Kim; Chang-Gyu Lee; Jeha Ryu (IEEE Trans. Haptics, 2015)

Time slot optimization algorithm for multisource energy harvesting systems. - Sung-Youb Jung; Myeong-Jae Park; Minbok Lee; Joonseok Yang; Jaeha Kim (ESSCIRC, 2016)

Rendering Moving Tactile Stroke on the Palm Using a Sparse 2D Array. - Jaeyoung Park 001; Jaeha Kim; Yonghwan Oh; Hong Z. Tan (EuroHaptics (1), 2016)

Session 10 overview: Advanced wireline transceivers and PLLs. - Jaeha Kim; Roberto Nonis (ISSCC, 2016)

13.1 A 940MHz-bandwidth 28.8µs-period 8.9GHz chirp frequency synthesizer PLL in 65nm CMOS for X-band FMCW radar applications. - Hwanseok Yeo; Sigang Ryu; Yoontaek Lee; Seuk Son; Jaeha Kim (ISSCC, 2016)

A field-programmable mixed-signal IC with time-domain configurable analog blocks. - Yunju Choi; Yoontaek Lee; Seung-Heon Baek; Sung-Joon Lee; Jaeha Kim (VLSI Circuits, 2016)

Efficient Global Optimization of Analog Circuits Using Predictive Response Surface Models on Discretized Design Space. - Jiho Lee; Jaeha Kim (IEEE Des. Test, 2016)

Adaptive vibrotactile flow rendering of 2.5D surface features on touch screen with multiple fingertip interfaces. - Jaeha Kim; Yonghwan Oh; Jaeyoung Park (WHC, 2017)

Compensation of perceived hardness of a virtual object with cutaneous feedback. - Jaeyoung Park 001; Jaeha Kim; Yonghwan Oh; Hong Z. Tan (WHC, 2017)

Introduction to the Special Section on the 2016 Asian Solid-State Circuits Conference (A-SSCC 2016). - Deog-Kyoon Jeong; Jaeha Kim (IEEE J. Solid State Circuits, 2017)

EE6: Can artificial intelligence replace my job? The dawn of a new IC industry with AI. - Jaeha Kim; Ki-Tae Park (ISSCC, 2018)

CHIMERA: A Field-Programmable Mixed-Signal IC With Time-Domain Configurable Analog Blocks. - Yunju Choi; Yoontaek Lee; Seung-Heon Baek; Sung-Joon Lee; Jaeha Kim (IEEE J. Solid State Circuits, 2018)

Electronic skins for soft, compact, reversible assembly of wirelessly activated fully soft robots. - Yoontaek Lee; Jaeyoung Yoon; Byeongmoon Lee; Eunho Oh; Seungjun Chung; Takhee Lee; Kyu-Jin Cho; Jaeha Kim; Yongtaek Hong (Sci. Robotics, 2018)

Design and Analysis of Energy-Efficient Single-Pulse Piezoelectric Energy Harvester and Power Management IC for Battery-Free Wireless Remote Switch Applications. - Minbok Lee; Joonseok Yang; Myeong-Jae Park; Sung-Youb Jung; Jaeha Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A channel-emulating high-speed transmitter with pseudo-logarithmic and low-bandwidth amplifiers. - Kyunghoon Kim; Jaeha Kim (IEICE Electron. Express, 2019)

A 2 × Blind Oversampling FSE Receiver With Combined Adaptive Equalization and Infinite-Range Timing Recovery. - Seuk Son; Sigang Ryu; Hwanseok Yeo; Jaeha Kim (IEEE J. Solid State Circuits, 2019)

An Accurate and Noise-Resilient Spread-Spectrum Clock Tracking Aid for Digitally-Controlled Clock and Data Recovery Loops. - Sigang Ryu; Seuk Son; Jaeha Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Modeling and Simulation of NAND Flash Memory Sensing Systems with Cell-to-Cell Vth Variations. - Nayoung Choi; Jaeha Kim (ICCAD, 2020)

Fast Automatic Circuit Optimization Using Deep Learning. - Jiwoo Hong; Sunghoon Kim; Jaeha Kim; Dongsuk Jeon (ISOCC, 2021)

Safety Verification of AMS Circuits with Piecewise-Linear System Reachability Analysis. - Seyoung Kim; Heechun Park; Jaeha Kim (ISOCC, 2021)

A Time-Based Pipelined ADC Using Integrate-and-Fire Multiplying-DAC. - Sigang Ryu; Chan Young Park; Wooryeol Kim; Seuk Son; Jaeha Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A Gradient-Descent Calibration Method to Mitigate Process Variations in Analog Synapse Arrays. - Seung-Heon Baek; Jaeha Kim (ICEIC, 2022)

XSNN: a System-Level Simulator for Spiking Neural Network with Neuron Circuits and Synapse Devices. - Jeong Woo Min; Jaeha Kim (ISOCC, 2022)

Seemo: A new tool for early design window view satisfaction evaluation in residential buildings. - Jaeha Kim; Michael Kent; Katharina Kral; Timur Dogan (CoRR, 2022)

Toward Real-World Super-Resolution via Adaptive Downsampling Models. - Sanghyun Son 002; Jaeha Kim; Wei-Sheng Lai; Ming-Hsuan Yang 001; Kyoung Mu Lee (IEEE Trans. Pattern Anal. Mach. Intell., 2022)

A 2.5-32 Gb/s Gen 5-PCIe Receiver With Multi-Rate CDR Engine and Hybrid DFE. - Moon-Chul Choi; Sanghee Lee 002; Seungha Roh; Kwangho Lee; Jonghyun Oh; Sungwoo Kim 001; Kwandong Kim; Woo-Seok Choi; Jaeha Kim; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Recovering 3D Hand Mesh Sequence from a Single Blurry Image: A New Dataset and Temporal Unfolding. - Yeonguk Oh; JoonKyu Park; Jaeha Kim; Gyeongsik Moon; Kyoung Mu Lee (CVPR, 2023)

Reachability Analysis for Nonlinear Analog/Mixed-Signal Circuits With Trajectory-Based Reachable Sets. - Seyoung Kim; Jaeha Kim (IEEE Access, 2023)

Accurate Layout-Dependent Effect Model in 10 nm-Class DRAM Process Using Area-Efficient Array Test Circuits. - Seyoung Kim; Seungho Yang; Hyein Lim; Hyein Lee 008; Jongwook Jeon; Jung Yun Choi; Jaeha Kim (IEEE Access, 2023)

Beyond Image Super-Resolution for Image Recognition with Task-Driven Perceptual Loss. - Jaeha Kim; Junghun Oh; Kyoung Mu Lee (CVPR, 2024)

Fractionally-Spaced Equalizers as Clock and Data Recovery Loops. - Sigang Ryu; Jaeha Kim; Arijit Raychowdhury (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

WITCH: WeIghTed Coding Scheme for Crosstalk Reduction in High Bandwidth Memory. - Seoyoon Jang; Sangouk Jeon; Kwanghyun Shin; Dongkwon Lee; Hankyu Chi; Wookjin Shin; Changhyun Pyo; Jaeha Kim; Dongsuk Jeon (ASP-DAC, 2025)

Invited paper: Modeling and Simulation of Silicon Photonics Systems in SystemVerilog/XMODEL. - Jaeha Kim (ASP-DAC, 2025)

Implementing FFE-MLSD With Improved BER and Reduced Complexity for Long-Reach PAM4 Wireline Receivers. - Hanseok Kim; Sihyun Lee; Piljun Jeong; Jaeha Kim; Woo-Seok Choi (IEEE Access, 2025)

Exploiting Diffusion Prior for Task-driven Image Restoration. - Jaeha Kim; Junghun Oh; Kyoung Mu Lee (CoRR, 2025)